GMS81508B HYNIX [Hynix Semiconductor], GMS81508B Datasheet - Page 68

• Manufacturer Part Number: GMS81508B
• Description: HYUNDAI MICRO ELECTRONICS 8-BIT SINGLE-CHIP MICROCONTROLLERS
• Manufacturer: HYNIX [Hynix Semiconductor]

HYUNDAI MicroElectronics
Example: Sets the watchdog timer detection time to 0.5 sec at 4.19MHz
Enable and Disable Watchdog
Watchdog timer is enabled by setting WDTON (bit 5 in
CKCTLR) to “1”. WDTON is initialized to “0” during re-
set and it should be set to “1” to operate after reset is re-
leased.
Example: Enables watchdog timer for Reset
The watchdog timer is disabled by clearing bit 5 (WD-
TON) of CKCTLR. The watchdog timer is halted in STOP
mode and restarts automatically after STOP mode is re-
leased.
If the watchdog timer output becomes active, a reset is gen-
erated, which drives the RESET pin low to reset the inter-
nal hardware.
DEC. 1999 Ver 1.04
Within WDT
detection time
Within WDT
detection time
:
LDM
:
:
Source clock
BIT overflow
Binary-counter
WDTR
WDTIF interrupt
WDT reset
CKCTLR,#xx1x_xxxxB;
LDM
LDM
LDM
:
:
:
:
LDM
:
:
:
:
LDM
CKCTLR,#3FH
WDTR,#04FH
WDTR,#04FH
WDTR,#04FH
WDTR,#04FH
1
Figure 17-3 Watchdog timer Timing
n
WDTON
2
3
1
WDTR
;Select 1/2048 clock source, WDTON
;Clear counter
;Clear counter
;Clear counter
0
3
Watchdog Timer Interrupt
The watchdog timer can be also used as a simple 6-bit tim-
er by clearing bit5 of CKCTLR to “0”. The interval of
watchdog timer interrupt is decided by Basic Interval Tim-
er. Interval equation is shown as below.
The stack pointer (SP) should be initialized before using
the watchdog timer output as an interrupt source.
Example: 6-bit timer interrupt set up.
The main clock oscillator also turns on when a watchdog
timer reset is generated in sub clock mode.
“0100_0011
1
LDM
LDM
:
B
”
2
T
=
CKCTLR,#xx0xxxxxB;
WDTR,#7FH
WDTR
3
Match
Detect
Interval of BIT
GMS81508B/16B/24B
Counter
Clear
reset
1, Clear Counter
;
WDTCL
0
WDTON
1
0
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