EM65571AGH EMC [ELAN Microelectronics Corp], EM65571AGH Datasheet - Page 25

• Manufacturer Part Number: EM65571AGH
• Description: 130COM / 128SEG 65K Color STN LCD Driver
• Manufacturer: EMC [ELAN Microelectronics Corp]

Product Specification (V1.0) 08.04.2005
(This specification is subject to change without further notice)
7.1.7 3-Wire Type Serial Interface
After completion of an 8-bit data transfer, or when making no access, be sure to set
the serial clock input (SCL) to “L”. Care of the SDA and SCL signals against
external noise should be taken into consideration during board wiring. To prevent
transfer error due to external noise, release the chip select (CSB = “H”) after every
completion of an 8-bit data transfer.
through the SDA and SCL input pins. When chip select is inactive (CSB = “H”), the
internal shift register and counter are reset to the initial condition. Serial data SDA
is input sequentially in the order from RS, D7 to D0 at the rising edge of the serial
clock (SCL) and is converted into 9-bit parallel data (by serial to parallel
conversion) at the rising edge of the 9th serial clock. The identification whether
serial data input (SDA), display data or control register data is determined by the
first serial input data (RS) and SPOL pin as follows.
the serial clock input (SCL) to “L”. Care of the SDA and SCL signals against
external noise should be taken into consideration during board wiring. To prevent
transfer error due to external noise, release the chip select (CSB = “H”) after every
completion of 9-bit data transfer.
When chip select is active (CSB = “L”), 3-wire type serial interface can work
After completion of a 9-bit data transfer, or when making no access, be sure to set
CSB
SDA
SCL
RS
RS
0
1
SPOL = “0”
1
D7
Display RAM/Register
Control Register Data
Display RAM Data
Figure 4. 4-wire Type Serial Interface
D6
2
D5
3
130COM/128SEG 65K Color STN LCD Driver
D4
4
RS
0
1
D3
5
D2
6
Display RAM/Register
SPOL = “1”
Control Register Data
Display RAM Data
D1
7
D0
8
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