EM65571AGH EMC [ELAN Microelectronics Corp], EM65571AGH Datasheet - Page 81

• Manufacturer Part Number: EM65571AGH
• Description: 130COM / 128SEG 65K Color STN LCD Driver
• Manufacturer: EMC [ELAN Microelectronics Corp]

Product Specification (V1.0) 08.04.2005
(This specification is subject to change without further notice)
REF
0
1
Note: maxH: The internal maximum X-address in each access mode.
In each operation mode, the following increment operation is performed:
Accessing the RAM once, accesses two bytes.
The X-addresses increment in the order of 00H, 01H,…3EH, and 3FH.
8.2.7 Power Control Register
(During a reset: {AMPON, HALT, DCON, ACL} = 0H, read address: BH)
The internal conditions at power saving are as follows.
D7
1
AX:
AY:
When each AX exceed AE, increment AY
D6
0
a. The oscillating circuit and power supply circuit are stopped.
b. The LCD driver is stopped, and output of the segment driver and common driver
c. The clock input from the CK pin is inhibited.
d. The contents of the Display RAM data are maintained.
e. The operational mode maintains the state of command execution before
Address
(i)
(ii) When in gradation display mode and 16-bit access are selected:
Address
START
START
ACL
DCON
HALT
The internal circuit can be initialized.
ACL = “0”: Normal operation
ACL = “1”: Initialization ON
The internal booster circuit is set ON/OFF
DCON = “0”: Booster circuit OFF
DCON=”1”: Booster circuit ON
The conditions of power saving are set ON/OFF by this command.
HALT = “0”: Normal operation
HALT=”1”: Power-saving operation
When a reset operation begins internally after the ACL register is set to “1”, the
ACL register is automatically cleared to “0”. An internal reset signal is generated
by a clock (built-in oscillation circuit or CK input) for the display. Hence, include a
WAIT period for the display clock for at least two cycles. After a WAIT period,
proceed with the next operation.
When setting in the power-saving state, the consumed current can be reduced to
a value near to the standby current.
are VSS level.
executing power saving command.
Transition of AX and AY Register
D5
1
Address is incremented as described above.
When gradation display mode, 8-bit access is selected
D4
Address+1
Address+1
1
START
START
AMPON HALT DCON
D3
D2
Address
Address
END
END
D1
130COM/128SEG 65K Color STN LCD Driver
ACL
D0
AX:
AY:
Address)
(START
maxH-
CSB RS RDB WRB RE2 RE1 RE0
Transition of X and Y Address
0
Same as AX and AY register
Same as AY register
1
Address+1)
(START
maxH-
1
0
0
Address)
maxH-
EM65571
(END
0
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