MAX11131AUI+ Maxim Integrated, MAX11131AUI+ Datasheet
MAX11131AUI+
Specifications of MAX11131AUI+
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MAX11131AUI+ Summary of contents
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Low-Power, Serial 12-/10-Bit, General Description The MAX11129–MAX11132 are 12-/10-bit with external reference and industry-leading 1.5MHz, full linear band- width, high speed, low-power, serial output successive approximation register (SAR) analog-to-digital convert- ers (ADCs). The MAX11129–MAX11132 include both internal and external ...
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... Signal-to-Noise Plus Distortion Signal-to-Noise Ratio Total Harmonic Distortion (Up to the 5th Harmonic) Spurious-Free Dynamic Range Intermodulation Distortion Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Continuous Power Dissipation (T TQFN (derate 34.4mW/NC above +70NC)..................2758mW TSSOP (derate 27mW/NC above +70NC)...................2162mW + 0.3V) and +4V DD Operating Temperature Range ...
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... Input Voltage Range Absolute Input Voltage Range Static Input Leakage Current Input Capacitance EXTERNAL REFERENCE INPUT REF- Input Voltage Range REF+ Input Voltage Range REF+ Input Current Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, = 3Msps 48MHz, 50% duty cycle, V SAMPLE SCLK = +25NC.) (Note 2) A ...
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... Output Voltage Low Output Voltage High Three-State Leakage Current Three-State Output Capacitance POWER REQUIREMENTS Positive Supply Voltage Digital I/O Supply Voltage Positive Supply Current Power Dissipation Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, = 3Msps 48MHz, 50% duty cycle, V SAMPLE SCLK = +25NC.) (Note 2) A SYMBOL ...
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... Resolution Integral Nonlinearity Differential Nonlinearity Offset Error Gain Error Offset Error Temperature Coefficient Gain Temperature Coefficient Channel-to-Channel Offset Matching Line Rejection Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, = 3Msps 48MHz, 50% duty cycle, V SAMPLE SCLK = +25NC.) (Note 2) A SYMBOL CONDITIONS t Externally clocked conversion ...
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... Conversion Time External Clock Frequency Aperture Delay Aperture Jitter ANALOG INPUT Input Voltage Range Absolute Input Voltage Range Static Input Leakage Current Input Capacitance Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, = 3Msps 48MHz, 50% duty cycle, V SAMPLE SCLK = +25NC.) (Note 2) A SYMBOL CONDITIONS ...
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... Output Voltage Low Output Voltage High Three-State Leakage Current Three-State Output Capacitance POWER REQUIREMENTS Positive Supply Voltage Digital I/O Supply Voltage Positive Supply Current Power Dissipation Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, = 3Msps 48MHz, 50% duty cycle, V SAMPLE SCLK = +25NC.) (Note 2) A SYMBOL ...
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... Note 9: The operational input voltage range for each individual input of a differentially configured pair is from V operational input voltage difference is from -V Note 10: See Figure 3 (Equivalent Input Circuit). Note 11: Guaranteed by characterization. Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, = 3Msps 48MHz, 50% duty cycle, V SAMPLE SCLK = +25NC ...
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... INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE 1 3.0Msps SAMPLE 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 1024 2048 3072 DIGITAL OUTPUT CODE (DECIMAL) Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit Typical Operating Characteristics = +25°C, unless otherwise noted.) DIFFERENTIAL NONLINEARITY vs. OUTPUT CODE 1 3.0Msps SAMPLE 0.5 0 -0.5 -1.0 4096 0 1024 2048 DIGITAL OUTPUT CODE (DECIMAL) MAX11129– ...
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... TEMPERATURE (°C) SNR AND SINAD vs. ANALOG INPUT FREQUENCY 74 3.0Msps SAMPLE 73.5 73.0 72.5 72.0 71.5 71.0 0 300 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Typical Operating Characteristics (continued) = +25°C, unless otherwise noted 110 125 SNR SINAD 600 900 1200 1500 f (kHz) IN MAX11129–MAX11132 ...
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... IN REFERENCE CURRENT vs. SAMPLING RATE 200 150 100 500 1000 1500 2000 2500 f (ksps) S Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Typical Operating Characteristics (continued) = +25°C, unless otherwise noted.) THD vs. INPUT RESISTANCE - 3.0Msps SAMPLE f = 500.0486kHz IN -85 -90 -95 -100 1500 0 100 ...
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... TOP VIEW 21 DGND 22 OVDD 23 24 DOUT 25 EOC AIN0 26 AIN1 AIN2 1 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit GND 13 REF-/AIN15 12 CNVST/AIN14 MAX11129 AIN13 11 MAX11131 10 AIN12 AIN11 9 8 AIN10 TQFN 16 CHANNEL TOP VIEW + AIN0 1 AIN1 2 AIN2 ...
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... Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, MAX11130 MAX11132 NAME (8 CHANNEL) TQFN — AIN0–AIN13 Analog Inputs 26, 27, 28, 1–5 AIN0–AIN7 Analog Inputs CNVST/ — Active-Low Conversion Start Input/Analog Input 14 AIN14 12 ...
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... This feature frees the controlling unit for other tasks while lower- ing overall system noise and power consumption. The MAX11129–MAX11132 includes internal clock. The internal clock mode features an integrated FIFO, allowing Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, V OVDD REF+ ...
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... DOUT Ch[3] Ch[2] Ch[1] Ch[0] Figure 2b. External Clock Mode Timing Diagram with CHAN_ID=1 for Best Performance Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Input Bandwidth edge of SCLK. A high-to-low transition on CS samples the analog inputs and initiates a new frame. A frame is defined as the time between two falling edges of CS. ...
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... The MAX11129–MAX11132 feature 15 pseudo differen- tial inputs by setting the PDIFF_COM bits in the Unipolar register to 1 (Table 10). The 15 analog input signals inputs are referenced signal applied to the REF-/AIN15. Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit single-ended ...
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... The MAX11129–MAX11132 operate from an internal oscillator, which is accurate within Q15% of the 40MHz nominal clock rate. Request internally timed conversions by writing the appropriate sequence to the ADC Mode Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit -1.5 LSB Figure 5. Bipolar Transfer Function for 12-Bit Resolution ...
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... RESULTS STORED IN FIFO Figure 6. Internal Conversions with CNVST CS EOC SCLK 1 DIN DOUT MODE CONTROL Figure 7. Internal Conversions with SWCNV Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, 1 READ DATA FROM FIFO INTERNALLY CLOCKED ACQUISITIONS AND CONVERSIONS 16 SWCNV = 1 INTERNAL OSCILLATOR ON SCAN OPERATION AND RESULTS STORED IN FIFO MAX11129– ...
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... Custom Scan0 or Custom Scan1 registers. A new CS DIN DOUT Figure 8. Echo Back the Configuration Data Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Analog Input I/P MUX is selected every frame on the thirteenth falling edge of SCLK. Custom_Int works with the internal clock. Custom_Ext works with the external clock. ...
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... T S Figure 9. SampleSet Use-Model Example Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, that the ADC can resolve (Nyquist Theorem) is 93.75kHz. If all 16 channels must be measured, with some chan- nels having greater than 93.75kHz input frequency, the user must revert back to manual mode requiring con- stant communication on the serial interface ...
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... SCAN[3:0] 14:11 0001 CHSEL[3:0] 10:7 0000 RESET[1:0] 6:5 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Averaging Mode The MAX11129–MAX11132 communicate between the internal registers and the external circuitry through the SPI-/QSPI-compatible serial interface. register access and control. detail the various functions and configurations. ...
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... Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Power Management Modes (Table 5). In external clock mode, PM[1:0] selects 00 between normal mode and various power-down modes of operation. External Clock Mode. Channel address is always present in internal clock mode. 0 Set to 1, DOUT is a 16-bit data word containing a 4-bit channel address, followed by a 12-bit conversion result led by the MSB ...
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... Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, MODE NAME Scans channels 0 through N Clock mode: External clock 0 Standard_Ext Channel scan/sequence: N channels in ascending order Channel selection: See Table 4, CHSEL[3:0] determines channel N Averaging: No Scans channel N through the highest numbered channel. The FIFO stores X conversion results where Channel 16– ...
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... Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, MODE NAME Scans preprogrammed channel sequence with maximum length of 256. There is no restriction on the channel pattern. Clock mode: External clock only 1 SampleSet Channel scan/sequence: Unique channel sequence Maximum depth: 256 conversions ...
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... BIT CONFIG_SETUP 15:11 REFSEL 10 AVGON 9 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Power-Down Mode When the PM_ bits in the ADC Mode Control register are asserted edge the next frame. The device powers up Static Shutdown again at the following falling edge of CS. There are two ...
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... Table 6. ADC Configuration Register (continued) BIT NAME BIT NAVG[1:0] 8:7 NSCAN[1:0] 6:5 SPM[1:0] 4:3 ECHO 2 — 1:0 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, DEFAULT STATE Valid for internal clock mode only. AVGON NAVG1 Scans channel N and returns results. Valid for repeat mode only. ...
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... SampleSet Mode of Operation The SampleSet register stores the unique channel sequence length. The sequence pattern is comprised 256 unique single-ended and/or differential conver- sions with any order or pattern. Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, DEFAULT STATE N/A Set to 10011 to select the RANGE register ...
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... UNIPOLAR REGISTER BIT NAME UCH0 AIN0 Selection: 1 CHSEL[3:0] = 0000 CHSCAN0 = AIN1 Selection: 1 CHSEL[3:0] = 0001 CHSCAN1 = Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, SUPPORTED WAVEFORMS REFSEL = 0 REF+ RANGE IN+ REF+ REF+ GND, AIN15 PDIFF_COM = 1 REF+ RANGE IN+ REF+ ...
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... BCH10/11 5 BCH12/13 4 BCH14/15 3 — 2:0 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, STATE — Set to 10001 to select the Unipolar register. Set configure AIN0 and AIN1 for pseudo-differential conversion. 0 Set configure AIN0 and AIN1 for single-ended conversion. Set configure AIN2 and AIN3 for pseudo-differential conversion. ...
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... BIT NAME BIT DEFAULT STATE SMPL_SET 15:11 SEQ_LENGTH 10:3 — 2:0 Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, — Set to 10100 to select the Custom Scan0 register. 0 Set scan AIN15. Set omit AIN15. 0 Set scan AIN14. Set omit AIN14. 0 Set scan AIN13. Set omit AIN13. ...
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... However, data on DOUT is not valid in following frames until a new ADC mode control instruction is coded. Programming Sequence Flow Chart See Figure 11 for programming sequence. Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit ENTRY 1 ENTRY 2 LOAD SampleSet PATTERN TIME BETWEEN CS FALLING AND ...
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... BIPOLAR REGISTER SET PER REGISTER SET BIT PDIFF_COM CHANNEL UCH{X}/{X+ FOR PSEUDO- AND BCH{X}/{X+ FOR DIFFERENTIAL SELECTION SINGLE-ENDED SELECTION Figure 11. ADC Programming Sequence Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, SELECT REFERENCE SINGLE-ENDED OR DIFFERENTIAL SELECT ADC FIGURE OUT NUMBER OF CHANNELS TO USE (N) ...
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... NO ADC CONFIGURATION REGISTER YES UPPER-INT NO ADC CONFIGURATION REGISTER YES CUSTOM-INT NO ADC CONFIGURATION REGISTER Figure 12. ADC Mode Select Programming Sequence Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, INTERNAL INTERNAL/EXTERNAL CLOCK NO AVERAGE YES SET AVG ON BIT TO 1 SET NAVG[1: ADC CONFIGURATION REGISTER SET NSCAN[1:0] FOR SCAN COUNT ...
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... DC 2 500I 4 5 INPUT 2 MAX4430 Figure 13. Typical Application Circuit Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, U Initial voltage accuracy U Temperature drift U Current source capability U Current sink capability U Quiescent current U Noise. The MAX6033 and MAX6043 are also excellent +5V 0.1µF 10µ 100pF 0.1µ ...
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... Therefore, SNR is computed by taking the ratio of the RMS signal to the RMS noise, which includes all spectral components minus the fundamental, the first five harmonics, and the DC offset. Maxim Integrated 3Msps, Low-Power, Serial 12-/10-Bit, Definitions Total harmonic distortion (THD) is expressed as: where V are the amplitudes of the 2nd- through 5th-order harmonics ...
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... PART PIN-PACKAGE MAX11129ATI+ 28 TQFN-EP* MAX11130ATI+ 28 TQFN-EP* MAX11131ATI+ 28 TQFN-EP* MAX11131AUI+ 28 TSSOP-EP* MAX11132ATI+ 28 TQFN-EP* Note: All devices are specified over the -40°C to +125°C temperature range. +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Package Information For the latest package outline information and land patterns (foot- prints www.maximintegrated.com/packages. Note that a “ ...
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... Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 2012 Maxim Integrated Products, Inc. © MAX11129–MAX11132 3Msps, Low-Power, Serial 12-/10-Bit, DESCRIPTION The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc. 8-/16-Channel ADCs Revision History PAGES CHANGED — ...