S9S12GN32F0MLF Freescale Semiconductor, S9S12GN32F0MLF Datasheet - Page 355

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S9S12GN32F0MLF

Manufacturer Part Number
S9S12GN32F0MLF
Description
16-bit Microcontrollers - MCU 16-bit32k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12GN32F0MLF

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
32 KB
Data Ram Size
2048 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT

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9.1.4
By securing the device, unauthorized access to the EEPROM and Flash memory contents can be prevented.
However, it must be understood that the security of the EEPROM and Flash memory contents also depends
on the design of the application program. For example, if the application has the capability of downloading
code through a serial port and then executing that code (e.g. an application containing bootloader code),
then this capability could potentially be used to read the EEPROM and Flash memory contents even when
the microcontroller is in the secure state. In this example, the security of the application could be enhanced
by requiring a challenge/response authentication before any code can be downloaded.
Secured operation has the following effects on the microcontroller:
9.1.4.1
9.1.4.2
Special single chip mode means BDM is active after reset. The availability of BDM firmware commands
depends on the security state of the device. The BDM secure firmware first performs a blank check of both
the Flash memory and the EEPROM. If the blank check succeeds, security will be temporarily turned off
and the state of the security bits in the appropriate Flash memory location can be changed If the blank
check fails, security will remain active, only the BDM hardware commands will be enabled, and the
accessible memory space is restricted to the peripheral register area. This will allow the BDM to be used
to erase the EEPROM and Flash memory without giving access to their contents. After erasing both Flash
Freescale Semiconductor
Background debug module (BDM) operation is completely disabled.
Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide for
details.
Tracing code execution using the DBG module is disabled.
BDM firmware commands are disabled.
BDM hardware commands are restricted to the register space.
Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide for
details.
Tracing code execution using the DBG module is disabled.
Operation of the Secured Microcontroller
Normal Single Chip Mode (NS)
Special Single Chip Mode (SS)
Please refer to the Flash block guide for actual security configuration (in
section “Flash Module Security”).
SEC[1:0]
MC9S12G Family Reference Manual, Rev.1.23
00
01
10
11
Table 9-4. Security Bits
NOTE
Security State
0 (unsecured)
1 (secured)
1 (secured)
1 (secured)
Security (S12XS9SECV2)
357

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