S9S12G48F0MLHR Freescale Semiconductor, S9S12G48F0MLHR Datasheet - Page 387

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S9S12G48F0MLHR

Manufacturer Part Number
S9S12G48F0MLHR
Description
16-bit Microcontrollers - MCU 16Bit 48KFlash 4096RAM MSCAN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G48F0MLHR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
48 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12G48F0MLHR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
10.3.2.12 S12CPMU COP Timer Arm/Reset Register (CPMUARMCOP)
This register is used to restart the COP time-out period.
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”) writing to this register has no effect.
When the COP is enabled by setting CR[2:0] nonzero, the following applies:
Freescale Semiconductor
0x003F
Reset
W ARMCOP-Bit
R
Writing any value other than $55 or $AA causes a COP reset. To restart the COP time-out period
write $55 followed by a write of $AA. These writes do not need to occur back-to-back, but the
sequence ($55, $AA) must be completed prior to COP end of time-out period to avoid a COP reset.
Sequences of $55 writes are allowed. When the WCOP bit is set, $55 and $AA writes must be done
in the last 25% of the selected time-out period; writing any value in the first 75% of the selected
period will cause a COP reset.
0
7
0
7
ARMCOP-Bit
0
6
0
6
Figure 10-15. S12CPMU CPMUARMCOP Register
MC9S12G Family Reference Manual, Rev.1.23
ARMCOP-Bit
0
5
0
5
ARMCOP-Bit
0
4
0
4
ARMCOP-Bit
S12 Clock, Reset and Power Management Unit (S12CPMU)
0
3
0
3
ARMCOP-Bit
0
2
0
2
ARMCOP-Bit
0
1
0
1
ARMCOP-Bit
0
0
0
0
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