DS1852B-000/C Maxim Integrated, DS1852B-000/C Datasheet - Page 7

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DS1852B-000/C

Manufacturer Part Number
DS1852B-000/C
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS1852B-000/C

Part # Aliases
90-1852B-00C
If too high a value is used in the four bits, then the resolution of the 12 bits is too high and absolute
accuracy is sacrificed. If too low a value is used in the four bits, then the resolution of the 12 bits is too
small, so a maximum reading is not possible and a large gain error is present through the entire range.
Example code can be found near the end of this data sheet.
POWER-ON LOGIC
V
outputs are held in their reset state. When V
The DS1852 will not begin monitoring operations until V
voltage. However, communication on the 2-wire bus can occur at a V
minimum voltage. This allows access to the power-on logic bit located in Table 00h, address 6Eh, bit 0.
The analog minimum voltage is less than 2.7V but greater than the digital minimum voltage. Above the
analog minimum voltage, the DS1852 will begin to function in a predictable manner but will not satisfy
specifications until V
TEMPERATURE-DEPENDENT FAST ALARM COMPARATORS
The DS1852 has a three-input muxing fast alarm comparator with a response time of less than 10µs for
each input. This provides a coarse but fast approximation of whether analog inputs B
above their temperature-dependent value. Each comparator has an 8-bit max value set in Table 03h,
address D8h to E7h. The trip point range is adjustable from 10mV to 2.5V. Each LSB is approximately
10mV. The outputs of these comparators are readable in Table 00h (alarm bytes 1 and 0) and may be
overwritten if their corresponding fast alarm override bit is set in Table 03h EEPROM.
The B
trip points for different temperature ranges. The P
four unique temperature-dependent values. For more information, refer to Table 03h.
HIGH-RESOLUTION ALARM COMPARATORS
There are 10 alarm comparators for the five analog channels. There is a 'high alarm' comparator whose
output is active if the analog signal is above its threshold and a 'low alarm' comparator whose output is
active if the analog signal is below its threshold. These comparators have a 2-byte set point in the same
format as the analog converter data in Table 03h. The outputs of these comparators are readable in Table
00h (70h) and may be overwritten if their corresponding alarm override bit is set in Table 03h
EEPROM.
WARNING COMPARATORS
The 10 warning comparators function the same way as the alarm comparators, but can be set to trip at
different levels. Typically, they would be set to trip prior to the alarm comparators. The set points are in
Table 03h and the outputs can be read from Table 00h.
CC
bits. This step has now adjusted the LSB of the lower 12 bits so that the best possible trim is
acquired with the lower 12 bits.
is compared to an internal reference voltage, and if it is below V
in
alarm can be set to eight unique temperature-dependent trip values, which allows the user to set
CC
is above 2.7V.
CC
rises above V
7 of 26
in
/R
in
fast alarms act similarly, but can only be set to
CC
CC
minimum, the system reset is released.
has risen above the analog minimum
CC
minimum, all internal logic and
CC
level lower than the analog
in
, P
in,
and R
in
are

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