DS1852B-000/C Maxim Integrated, DS1852B-000/C Datasheet - Page 9

• Manufacturer Part Number: DS1852B-000/C
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of DS1852B-000/C

• Part # Aliases: 90-1852B-00C

DS1852
Write Operations
After receiving a matching address byte with the R/W bit set low, the device goes into the write mode of
operation. The master must transmit an 8-bit EEPROM memory address to the device to define the
address where the data is to be written. After the byte has been received, the DS1852 will transmit a zero
for one clock cycle to acknowledge the receipt of the address. The master must then transmit an 8-bit
data word to be written into this address. The DS1852 will again transmit a zero for one clock cycle to
acknowledge the receipt of the data. At this point the master must terminate the write operation with a
stop condition for the write to be initiated. If a start condition is sent in place of the stop condition, the
write is aborted and the data received during that operation is discarded. If the stop condition is received,
the DS1852 enters an internally timed write process (t
) to the EEPROM memory. The DS1852 will not
w
send an acknowledge bit for any 2-wire communication during the EEPROM write process.
The DS1852 is capable of an 8-byte page write. A page is any 8-byte block of memory starting with an
address evenly divisible by eight and ending with the starting address plus seven. For example,
addresses 00h through 07h constitute one page. Other pages would be addresses 08h through 0Fh, 10h
through 17h, 18h through 1Fh, etc.
A page write is initiated the same way as a byte write, but the master does not send a stop condition after
the first byte. Instead, after the slave has received the data byte, the master can send up to seven more
bytes using the same nine-clock sequence. The master must terminate the write cycle with a stop
condition or the data clocked into the DS1852 will not be latched into permanent memory.
The address counter rolls on a page during a write. The counter does not count through the entire
address space as during a read. For example, if the starting address is 06h and four bytes are written, the
first byte goes into address 06h. The second goes into address 07h. The third goes into address 00h (not
08h). The fourth goes into address 01h. If more than nine or more bytes are written before a stop
condition is sent, the first bytes sent are overwritten. Only the last eight bytes of data are written to the
page.
Acknowledge Polling
Once the internally timed write has started and the DS1852 inputs are disabled, acknowledge polling can
be initiated. The process involves transmitting a start condition followed by the device address. The
R/W bit signifies the type of operation that is desired. The read or write sequence will only be allowed to
proceed if the internal write cycle has completed and the DS1852 responds with a zero.
Read Operations
After receiving a matching address byte with the R/W bit set high, the device goes into the read mode of
operation. There are three read operations: current address read, random read, and sequential address
read.
CURRENT ADDRESS READ
The DS1852 has an internal address register that contains the address used during the last read or write
operation, incremented by one. This data is maintained as long as V
is valid. If the most recent address
CC
was the last byte in memory, then the register resets to the first address. This address stays valid between
operations as long as power is available.
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