MK60DN512VLQ10 Freescale Semiconductor, MK60DN512VLQ10 Datasheet - Page 38

• Manufacturer Part Number: MK60DN512VLQ10
• Description: ARM Microcontrollers - MCU KINETIS 512K ENET
• Manufacturer: Freescale Semiconductor

Specifications of MK60DN512VLQ10

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: K60
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Peripheral operating requirements and behaviors
6.4.3 Flexbus Switching Specifications
All processor bus timings are synchronous; input setup/hold and output delay are given in
respect to the rising edge of a reference clock, FB_CLK. The FB_CLK frequency may be
the same as the internal system bus frequency or an integer divider of that frequency.
38
EZP_CK
EZP_CS
EZP_Q (output)
EZP_D (input)
EP1a
Num
EP1
EP2
EP3
EP4
EP5
EP6
EP7
EP8
EP9
EZP_CK frequency of operation (all commands except
READ)
EZP_CK frequency of operation (READ command)
EZP_CS negation to next EZP_CS assertion
EZP_CS input valid to EZP_CK high (setup)
EZP_CK high to EZP_CS input invalid (hold)
EZP_D input valid to EZP_CK high (setup)
EZP_CK high to EZP_D input invalid (hold)
EZP_CK low to EZP_Q output valid
EZP_CK low to EZP_Q output invalid (hold)
EZP_CS negation to EZP_Q tri-state
Description
Table 24. EzPort switching specifications (continued)
K60 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
EP3
Figure 10. EzPort Timing Diagram
EP5
EP6
EP7
EP4
EP8
EP9
EP2
2 x t
Min.
—
—
EZP_CK
—
—
5
5
2
5
0
Freescale Semiconductor, Inc.
f
f
Max.
SYS
SYS
16
12
—
—
—
—
—
—
/2
/8
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns