W65C02S6TPG-14 Western Design Center (WDC), W65C02S6TPG-14 Datasheet - Page 11

• Manufacturer Part Number: W65C02S6TPG-14
• Description: Microprocessors - MPU 8-bit Microprocessor
• Manufacturer: Western Design Center (WDC)

Specifications of W65C02S6TPG-14

• Rohs: yes
• Processor Series: 65x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 14 MHz
• Operating Supply Voltage: 1.8 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-40
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 10

3.12 Set Overflow (SOB)
A negative transition on the Set Overflow (SOB) pin sets the overflow bit (V) in the status code register.
The signal is sampled on the rising edge of PHI2. SOB was originally intended for fast input recognition
because it can be tested with a branch instruction; however, it is not recommended in new system design
and was seldom used in the past.
3.13 SYNChronize with OpCode fetch (SYNC)
The OpCode fetch cycle of the microprocessor instruction is indicated with SYNC high. The SYNC output
is provided to identify those cycles during which the microprocessor is fetching an OpCode. The SYNC
line goes high during the clock cycle of an OpCode fetch and stays high for the entire cycle. If the RDY
line is pulled low during the clock cycle in which SYNC went high, the processor will stop in its current
state and will remain in the state until the RDY line goes high. In this manner, the SYNC signal can be
used to control RDY to cause single instruction execution.
3.14 Power (VDD) and Ground (VSS)
VDD is the positive power supply voltage and VSS is system logic ground.
3.15 Vector Pull (VPB)
The Vector Pull (VPB) output indicates that a vector location is being addressed during an interrupt
sequence. VPB is low during the last interrupt sequence cycles, during which time the processor reads
the interrupt vector. The VPB signal may be used to select and prioritize interrupts from several sources
by modifying the vector addresses.
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