KPC8544EVTANG Freescale Semiconductor, KPC8544EVTANG Datasheet - Page 113

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KPC8544EVTANG

Manufacturer Part Number
KPC8544EVTANG
Description
Microprocessors - MPU PQ38K 8544E
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KPC8544EVTANG

Product Category
Microprocessors - MPU
Rohs
yes
Maximum Clock Frequency
800 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
FCPBGA
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Factory Pack Quantity
5
21.10 Guidelines for High-Speed Interface Termination
This section provides guidelines for when the SerDes interface is either not used at all or only partly used.
21.10.1 SerDes Interface Entirely Unused
If the high-speed SerDes interface is not used at all, the unused pin should be terminated as described in
this section. However, the SerDes must always have power applied to its supply pins.
The following pins must be left unconnected (float):
The following pins must be connected to GND:
21.10.2 SerDes Interface Partly Unused
If only part of the high speed SerDes interface pins are used, the remaining high-speed serial I/O pins
should be terminated as described in this section.
The following pins must be left unconnected (float) if not used:
The following pins must be connected to GND if not used:
21.11 Guideline for PCI Interface Termination
PCI termination, if not used at all, is done as follows.
Option 1
Freescale Semiconductor
SD_TX[0:7]
SD_TX[0:7]
SD_RX[0:7]
SD_RX[0:7]
SD_REF_CLK
SD_REF_CLK
SD_TX[0:7]
SD_TX[0:7]
SD_RX[0:7]
SD_RX[0:7]
SD_REF_CLK
SD_REF_CLK
If PCI arbiter is enabled during POR,
All AD pins will be driven to the stable states after POR. Therefore, all ADs pins can be floating.
All PCI control pins can be grouped together and tied to OV
It is optional to disable PCI block through DEVDISR register after POR reset.
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 6
DD
through a single 10-kΩ resistor.
System Design Information
113

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