GTL2010PW,112 NXP Semiconductors, GTL2010PW,112 Datasheet

GTL2010PW,112

Manufacturer Part Number

GTL2010PW,112

Description

IC XLATR 10BIT BI-DIREC 24TSSOP

Manufacturer

NXP Semiconductors

Datasheets

1.GTL2010PW112.pdf (2 pages)

2.GTL2010PW118.pdf (20 pages)

Specifications of GTL2010PW,112

Package / Case

24-TSSOP

Logic Function

Translator, Bidirectional, Open Drain

Number Of Bits

Input Type

Voltage

Output Type

Voltage

Number Of Channels

Number Of Outputs/channel

Differential - Input:output

No/No

Propagation Delay (max)

1.5ns

Voltage - Supply

2.36 V ~ 2.64 V, 3 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Supply Voltage

3 V ~ 3.6 V

Logic Family

GTL

Supply Voltage (max)

2.64 V, 3.6 V

Supply Voltage (min)

2.36 V, 3 V

Maximum Operating Temperature

+ 85 C

Minimum Operating Temperature

- 40 C

Mounting Style

SMD/SMT

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Data Rate

Lead Free Status / Rohs Status

Lead free / RoHS Compliant

Other names

935263288112
GTL2010PW
GTL2010PW

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Low cost bidirectional voltage

Headline

translation without directional control

Unlike level-shifting bus switches, which only translate between fixed voltages, these bidirectional

low-voltage translators can translate any voltage between 1 and 5 V to any other voltage between

1 and 5 V. They also reduce ON-state resistance and minimize propagation delay.

Key features

4 N o directional control required for

4 L ow RON resistance (6.5 Ω) between

4 P ropagation delay: 1.5 ns (typ)

4 C hannel off-state capacitance: 7.5 pF

4 V ery low (5 µA) standby current

4 N o power supply required – prevents

4 V ery small QFN package options

Applications

4 U ni- and bidirectional translation for

4 B idirectional translation of low-

4 S hifting processor sideband I/O

bidirectional voltage translations

input and output pins (Sn/Dn)

latch-ups

any voltage between 1 and 5 V

voltage and legacy I

signals between GTL and LVTTL/TTL

levels

C-bus signals

The NXP family of Gunning Transceiver

Logic (GTL) bidirectional low-voltage

translators includes the 22-bit GTL2000,

the 2-bit GTL2002, the 8-bit GTL2003,

and the 10-bit GTL2010.

Each delivers high-speed translation

between different voltage levels with

low ON-state resistance and minimal

propagation delay.

They can translate any voltage between

1 and 5 V to any other voltage between

1 and 5 V as long as there is at least 1 V

difference between the voltage levels, so

they offer greater design flexibility than

level-shifting bus switches, which only

translate between fixed voltages.

Each GTL20xx device includes NMOS

pass transistors (Sn and Dn pins) with a

common gate (G

transistor (S

REF

and D

REF

pin) and a reference

REF

NXP bidirectional

low-voltage translators

GTL20xx

pins).

and Dn ports are linked through a low

ON-resistance connection. Assuming the

higher voltage is applied on the Dn port,

when the Dn port is high, the voltage on

the Sn port is limited to the voltage set

by S

propagation delay is kept to a minimum.

The transistors also provide excellent

ESD protection in case the low-voltage

devices that are less resistant to ESD.

The translators can be used in any

When one of the Sn or Dn ports is low,

the clamp is in the ON-state and the Sn

port is pulled to a higher voltage by a

pull-up resistor.

This set-up enables seamless translation

between user-selected voltages, without

the need for directional control signals.

All transistors have the same electrical

characteristics so deviation from one

output to another in voltage and

REF

. When the Sn port is high, the Dn

Related parts for GTL2010PW,112

GTL2010PW,112 Summary of contents

Page 1

Low cost bidirectional voltage Headline translation without directional control Unlike level-shifting bus switches, which only translate between fixed voltages, these bidirectional low-voltage translators can translate any voltage between 1 and any other voltage between 1 and 5 V. They also reduce ON-state resistance and minimize propagation delay. Key features directional control required for bidirectional voltage translations RON resistance (6.5 Ω) between input and output pins (Sn/Dn ropagation delay: 1.5 ns (typ hannel off-state capacitance: 7 ery low (5 µA) standby current power supply required – prevents latch-ups 4 V ery small QFN package options Applications 4 ...

Page 2

The open-drain construction, which eliminates the need for directional control, makes the translators ideal for designs that combine low-voltage (1.0 to 1.8 V) and legacy (3.3 and/or 5 bus signals. The translators can change I C-bus signal levels at speeds up to 3.4 2 MHz. The translators can also be used in designs that combine GTL and LVTTL/ TTL signals, shifting processor sideband I/O signals between voltage levels. Bidirectional voltage translation To configure the translators for bidirectional clamping, the G input REF must be connected to D and both REF pins must be pulled to the high-side V through a pull-up resistor (typically CC 200 kΩ). A filter capacitor REF recommended. The CPU output can be set as totem pole or open drain (pull-up resistors may be required), as can the chipset output ...

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