M95512-DFMN6TP STMicroelectronics, M95512-DFMN6TP Datasheet - Page 33

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M95512-DFMN6TP

Manufacturer Part Number
M95512-DFMN6TP
Description
EEPROM 512Kbit Serial Bus 128kB 10MHz EEProm
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95512-DFMN6TP

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M95512-W M95512-R M95512-DR M95512-DF
Table 12.
1. Sampled only, not 100% tested, at T
Table 13.
1. Cycling performance for products identified by process letters KB.
2. The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1,
3. A Write cycle is executed when either a Page Write, a Byte Write, a WRSR, a WRID or an LID instruction is
Table 14.
1. For products identified by process letters KB. The data retention behavior is checked in production. The
Ncycle
Data retention
Symbol
Symbol
C
4*N+2, 4*N+3] where N is an integer. The Write cycle endurance is defined by characterization and
qualification.
decoded. When using the Byte Write, the Page Write or the WRID instruction, refer also to
Cycling with Error Correction Code
200-year limit is defined from characterization and qualification results.
C
OUT
IN
Write cycle endurance
Output capacitance (Q)
Input capacitance (D)
Input capacitance (other pins)
Capacitance
Cycling performance by groups of four bytes
Memory cell data retention
(1)
Parameter
Parameter
Parameter
(1)
Doc ID 11124 Rev 20
(2)
(ECC).
A
= 25 °C and a frequency of 5 MHz.
TA  25 °C,
V
TA = 85 °C,
V
CC
CC
(min) < V
(min) < V
Test conditions
TA = 55 °C
Test conditions
Test conditions
V
CC
CC
V
V
OUT
IN
IN
< V
< V
= 0 V
= 0 V
= 0 V
CC
CC
(max)
(max)
(1)
Min.
Min.
DC and AC parameters
4,000,000
1,200,000
Min.
200
Max.
Max.
8
8
6
Section 6.6.1:
Write cycle
Unit
Year
Unit
Unit
pF
pF
pF
33/51
(3)

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