LFE3-150EA-6LFN1156I Lattice, LFE3-150EA-6LFN1156I Datasheet - Page 4

• Manufacturer Part Number: LFE3-150EA-6LFN1156I
• Description: FPGA - Field Programmable Gate Array 149K LUTs 586 I/O 1.2V -6 SPEED
• Manufacturer: Lattice

Specifications of LFE3-150EA-6LFN1156I

• Rohs: yes
• Factory Pack Quantity: 24

Lattice Diamond Design Software
Lattice Diamond
implementation tools optimized for cost sensitive, low-power Lattice
FPGA architectures. Diamond is the next generation replacement
for ispLEVER
design flow, and numerous other enhancements. The combination
of new and enhanced features allows users to complete designs
faster, easier, and with better results than ever before.
Intellectual Property
Lattice offers an expanding portfolio of IP cores (LatticeCORE
support the easy integration of commonly used functions. Lattice
also offers IP Suites that are a collection of related IP cores for
select applications/markets at very attractive prices. The following
table provides a partial listing of IP Suites available for the
LatticeECP3 family. In addition to these, Lat ticeCORE Connections
Partners also offer a wide range of IP. For a complete list of IP
options, please visit www.latticesemi.com/ip.
LatticeECP3 (Economy Plus FPGAs with SERDES, sysDSP Blocks, & Source Synchronous I/O)
1. -S = Standard Power; -L = Low Power
2. -9 = High-Speed Device
Applications Support
1-800-LATTICE (528-8423)
503-268-8001
[e-mail]
Copyright © 2012 Lattice Semiconductor Corporation. Lattice Semiconductor, L (stylized) Lattice Semiconductor Corp., and Lattice (design), ispLEVER, ispLeverCORE, Lattice Diamond, LatticeCORE,
LatticeECP3, LatticeECP2M, LatticeMico32, sysCLOCK, sysCONFIG, sysDSP, sysIO, sysMEM, and TransFR are either registered trademarks or trademarks of Lattice Semiconductor Corporation in the United
States and/or other countries. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
May 2012
Order #: I0198H
Design Made Simple with Advanced Design Software and IP
Parameter
LUTs (K)
Number of EBR SRAM Blocks
EBR Block SRAM (K bits)
Distributed RAM (K bits)
18x18 Embedded Multipliers
3.2Gbps SERDES Channels
Maximum Available I/O
Number of PLLs/DLLs
Power Grades
Speed Grades
Packages & SERDES / I/O Combinations
328-ball csBGA (10 x 10 mm)
256-ball ftBGA (17 x 17 mm)
484-ball fpBGA (23 x 23 mm)
672-ball fpBGA (27 x 27 mm)
1156-ball fpBGA (35 x 35 mm)
2
1
®
featuring design exploration, ease of use, improved
®
design software offers leading-edge design and
ECP3-17
-6, -7, -8
-S, -L
2/116
4/133
4/222
700
222
2+2
17
38
36
24
4
™
) to
LatticeCORE IP Suites for LatticeECP3 FPGAs
-6, -7, -8, -9
ECP3-35
Processing
IP Suite
Ethernet
Express
4/133
4/295
4/310
Video &
Display
-S, -L
1327
Gigbit
Signal
Value
310
4+2
33
72
68
64
PCI
4
• DDR3/DDR2/DDR Memory
• FFT Compiler
• PCI Express Endpoint x1 / x4
• PCI Express Root Complex
• PCI Target 32-bit / 64-bit
• 10Gb+ Ethernet MAC
• Scatter Gather DMA
• SGMII & Gigabit Ethernet
• Advanced FIR Filter
• Block Convolutional Encoder
• Block Viterbi Decoder
• Cascaded Integrated Comb
• CORDIC
• Correlator
• Distributed Arithmetic FIR
• 2D FIR Filter
• Color Space Converter
• Edge Detector
• Gamma Corrector
Controller
Lite x1 / x4
MAC
Filter - CIC
Filter
-6, -7, -8, -9
ECP3-70
12/490
-S, -L
4/295
8/380
4420
10+2
240
145
128
490
67
12
LATTICESEMI.COM
Included IP Cores
-6, -7, -8, -9
ECP3-95
12/490
4/295
8/380
-S, -L
4420
10+2
240
188
128
490
92
12
• FIR Filter Generator
• Triple Speed 10/100/1G
• PCI Master/Target 32-bit /
• Scatter Gather DMA
• Triple Speed 10/100/1G
• XAUI
• Dynamic Block Reed Solomon
• FFT Compiler
• FIR Filter Generator
• Interleaver / De-interleaver
• Numerically Controlled
• Turbo Decoder / Encoder
• Median Filter
• Tri-rate SDI PHY
• Scaler
Ethernet MAC
64-bit
Ethernet MAC
Decoder / Encoder
Oscillator
-6, -7, -8, -9
ECP3-150
16/586
8/380
-S, -L
6850
10+2
149
372
303
320
586
16