STM8S003K3T6CTR STMicroelectronics, STM8S003K3T6CTR Datasheet

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STM8S003K3T6CTR

Manufacturer Part Number
STM8S003K3T6CTR
Description
8-bit Microcontrollers - MCU Value Line ARM 8-Bit 16MHz 8kB 128Byte
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S003K3T6CTR

Product Category
8-bit Microcontrollers - MCU
Rohs
yes

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Features
Core
Memories
Clock, reset and supply management
June 2012
16 MHz advanced STM8 core with Harvard
architecture and 3-stage pipeline
Extended instruction set
Program memory: 8 Kbytes Flash; data retention
20 years at 55 °C after 100 cycles
RAM: 1 Kbytes
Data memory: 128 bytes of true data EEPROM;
endurance up to 100 000 write/erase cycles
2.95 to 5.5 V operating voltage
Flexible clock control, 4 master clock sources:
-
-
-
-
Clock security system with clock monitor
Power management:
-
-
Permanently active, low consumption power-on
and power-down reset
Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes
Low power crystal resonator oscillator
External clock input
Internal, user-trimmable 16 MHz RC
Internal low power 128 kHz RC
Low power modes (wait, active-halt, halt)
Switch-off peripheral clocks individually
LQFP32 7x7
TSSOP20
data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C
UFQFPN20 3x3
DocID018576 Rev 3
STM8S003K3 STM8S003F3
Interrupt management
Timers
Communications interfaces
Analog to digital converter (ADC)
I/Os
Development support
Nested interrupt controller with 32 interrupts
Up to 27 external interrupts on 6 vectors
Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-time
insertion and flexible synchronization
16-bit general purpose timer, with 3 CAPCOM
channels (IC, OC or PWM)
8-bit basic timer with 8-bit prescaler
Auto wake-up timer
Window watchdog and independent watchdog
timers
UART with clock output for synchronous
operation, Smartcard, IrDA, LIN master mode
SPI interface up to 8 Mbit/s
I
10-bit, ±1 LSB ADC with up to 5 multiplexed
channels, scan mode and analog watchdog
Up to 28 I/Os on a 32-pin package including 21
high sink outputs
Highly robust I/O design, immune against current
injection
Embedded single wire interface module (SWIM)
for fast on-chip programming and non intrusive
debugging
2
C interface up to 400 Kbit/s
www.st.com
1/100

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STM8S003K3T6CTR Summary of contents

Page 1

Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C TSSOP20 LQFP32 7x7 Features Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended ...

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Contents Contents 1 Introduction ..............................................................................................................7 2 Description ...............................................................................................................8 3 Block diagram ..........................................................................................................9 4 Product overview ...................................................................................................10 4.1 Central processing unit STM8 .....................................................................................10 4.2 Single wire interface module (SWIM) and debug module (DM) ..................................10 4.3 Interrupt controller .......................................................................................................11 4.4 Flash program ...

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STM8S003K3 STM8S003F3 9 Electrical characteristics ......................................................................................46 9.1 Parameter conditions ...................................................................................................46 9.1.1 Minimum and maximum values ...........................................................46 9.1.2 Typical values .......................................................................................46 9.1.3 Typical curves ......................................................................................46 9.1.4 Loading capacitor .................................................................................46 9.1.5 Pin input voltage ...................................................................................46 9.2 Absolute maximum ratings ..........................................................................................47 9.3 Operating ...

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List of tables List of tables Table 1. STM8S003xx value line features ................................................................................................8 Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers ..................................13 Table 3. TIM timer features ....................................................................................................................15 Table 4. Legend/abbreviations for pinout tables ...................................................................................18 Table 5. LQFP32 ...

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STM8S003K3 STM8S003F3 Table 48. EMI data .................................................................................................................................86 Table 49. ESD absolute maximum ratings .............................................................................................87 Table 50. Electrical sensitivities .............................................................................................................88 Table 51. 32-pin low profile quad flat package mechanical data ............................................................89 Table 52. 20-pin, 4.40 mm body, 0.65 mm pitch mechanical ...

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List of figures List of figures Figure 1. Block diagram ...........................................................................................................................9 Figure 2. Flash memory organization ....................................................................................................12 Figure 3. STM8S003K3 LQFP32 pinout ................................................................................................18 Figure 4. STM8S003F3 TSSOP20 pinout ..............................................................................................21 Figure 5. STM8S003F3 UFQFPN20-pin pinout .....................................................................................22 Figure 6. Memory map ...........................................................................................................................25 ...

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STM8S003K3 STM8S003F3 1 Introduction This datasheet contains the description of the device features, pinout, electrical characteristics, mechanical data and ordering information. • For complete information on the STM8S microcontroller memory, registers and peripherals, please refer to the STM8S microcontroller family ...

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Description 2 Description The STM8S003x value line 8-bit microcontrollers feature 8 Kbytes Flash program memory, plus integrated true data EEPROM. The STM8S microcontroller family reference manual (RM0016) refers to devices in this family as low-density. They provide the following benefits: ...

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STM8S003K3 STM8S003F3 3 Block diagram Reset block Reset POR Single wire Debug/SWIM debug interf. 400 Kbit/s 8 Mbit/s LIN master SPI emul channels 1/2/4 kHz beep Figure 1: Block diagram Clock controller Reset Detector BOR Clock to ...

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Product overview 4 Product overview The following section intends to give an overview of the basic features of the device functional modules and peripherals. For more detailed information please refer to the corresponding family reference manual (RM0016). 4.1 Central processing ...

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STM8S003K3 STM8S003F3 SWIM Single wire interface module for direct access to the debug module and memory programming. The interface can be activated in all device operation modes. The maximum data transmission speed is 145 bytes/ms. Debug module The non-intrusive debugging ...

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Product overview program, specific code libraries, reset and interrupt vectors, the reset routine and usually the IAP and communication routines. Read-out protection (ROP) The read-out protection blocks reading and writing from/to the Flash program memory and the data EEPROM in ...

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STM8S003K3 STM8S003F3 • Startup clock: After reset, the microcontroller restarts by default with an internal 2 MHz clock (HSI/8). The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts. • ...

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Product overview Window watchdog timer The window watchdog is used to detect the occurrence of a software fault, usually generated by external interferences or by unexpected logical conditions, which cause the application program to abandon its normal sequence. The window ...

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STM8S003K3 STM8S003F3 • Encoder mode • Interrupt sources input capture/output compare overflow/update break 4.11 TIM2 - 16-bit general purpose timer • 16-bit autoreload (AR) up-counter • 15-bit prescaler adjustable to fixed power of 2 ...

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Product overview • External trigger input • Trigger from TIM1 TRGO • End of conversion (EOC) interrupt 4.14 Communication interfaces The following communication interfaces are implemented: • UART1: Full feature UART, synchronous mode, SPI master mode, Smartcard mode, IrDA mode, ...

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STM8S003K3 STM8S003F3 4.14.2 SPI • Maximum speed: 8 Mbit/s (f • Full duplex synchronous transfers • Simplex synchronous transfers on two lines with a possible bidirectional data line • Master or slave operation - selectable by hardware or software • ...

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Pinout and pin description 5 Pinout and pin description Type Level Output speed Port and control configuration Reset state 5.1 STM8S003K3 LQFP32 pinout and pin description 18/100 Table 4: Legend/abbreviations for pinout tables I= Input Output ...

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STM8S003K3 STM8S003F3 1. (HS) high sink capability. 2. (T) True open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a ...

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Pinout and pin description Input Pin Pin Type no. name floating 15 PB1/AIN1/ I/O X TIM1_CH2N 16 PB0/AIN0/ I/O X TIM1_CH1N 17 PE5/ I/O X SPI_NSS 18 PC1/ I/O X TIM1_CH1/ UART1_CK 19 PC2/ I/O X TIM1_CH2 20 PC3/ I/O ...

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STM8S003K3 STM8S003F3 Input Pin Pin Type no. name floating 28 PD3/ I/O X TIM2_CH2/ ADC_ETR 29 PD4/BEEP/ I/O X TIM2_CH1 30 PD5/ I/O X UART1_TX 31 PD6/ I/O X UART1_RX 32 PD7/ TLI I/O X [TIM1_CH4] (1) I/O pins used ...

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Pinout and pin description 2. (T) True open drain (P-buffer and protection diode alternate function remapping option (If the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the ...

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STM8S003K3 STM8S003F3 Pin no. Pin name TSSOP20 UFQFPN20 2 19 PD5/ AIN5/ UART1 _TX 3 20 PD6/ AIN6/ UART1 _RX 4 1 NRST 5 2 PA1/ OSCIN ( PA2/ OSCOUT VCAP 9 ...

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Pinout and pin description Pin no. Pin name TSSOP20 UFQFPN20 16 13 PC6/ SPI_MOSI [TIM1_ CH1 PC7/ SPI_MISO [TIM1_ CH2 PD1/ (4) SWIM 19 16 PD2/AIN3/[TIM2_ CH3 PD3/ AIN4/ TIM2_ CH2/ ADC_ ETR (1) ...

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STM8S003K3 STM8S003F3 6 Memory and register map 6.1 Memory map Figure 6: Memory map 0x00 0000 RAM (1 Kbyte) 513 bytes stack 0x00 03FF 0x00 0800 Reserved 0x00 4000 Data EEPROM 0x00 407F Reserved 0x00 47FF 0x00 4800 Option bytes ...

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Memory and register map 6.2 Register map 6.2.1 I/O port hardware register map Address Block 0x00 5000 0x00 5001 0x00 5002 Port A 0x00 5003 0x00 5004 0x00 5005 0x00 5006 0x00 5007 Port B 0x00 5008 0x00 5009 0x00 ...

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STM8S003K3 STM8S003F3 Address Block 0x00 5018 Port E 0x00 5019 0x00 501A Port F 0x00 501B 0x00 501C 0x00 501D (1) Depends on the external circuitry. 6.2.2 General hardware register map Address Block 0x00 501E to Reserved area (60 bytes) ...

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Memory and register map Address Block 0x00 5063 Reserved area (1 byte) 0x00 5064 Flash 0x00 5065 to Reserved area (59 bytes) 0x00 509F 0x00 50A0 ITC 0x00 50A1 0x00 50A2 to Reserved area (17 bytes) 0x00 50B2 0x00 50B3 ...

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STM8S003K3 STM8S003F3 Address Block 0x00 50CC 0x00 50CD 0x00 50CE to ReservLK ed area (3 bytes) 0x00 50D0 0x00 50D1 WWDG 0x00 50D2 0x00 50D3 to 00 Reserved area (13 bytes) 50DF 0x00 50E0 IWDG 0x00 50E1 0x00 50E2 0x00 ...

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Memory and register map Address Block 0x00 5202 0x00 5203 0x00 5204 0x00 5205 0x00 5206 0x00 5207 0x00 5208 to Reserved area (8 bytes) 0x00 520F 2 0x00 5210 I C 0x00 5211 0x00 5212 0x00 5213 0x00 5214 ...

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STM8S003K3 STM8S003F3 Address Block 0x00 521C 0x00 521D 0x00 521E 0x00 521F to Reserved area (17 bytes) 0x00 522F 0x00 5230 UART1 0x00 5231 0x00 5232 0x00 5233 0x00 5234 0x00 5235 0x00 5236 0x00 5237 0x00 5238 0x00 5239 ...

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Memory and register map Address Block 0x00 5252 0x00 5253 0x00 5254 0x00 5255 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A 0x00 525B 0x00 525C 0x00 525D 0x00 525E 0x00 525F 0x00 5260 0x00 5261 0x00 5262 ...

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STM8S003K3 STM8S003F3 Address Block 0x00 5265 0x00 5266 0x00 5267 0x00 5268 0x00 5269 0x00 526A 0x00 526B 0x00 526C 0x00 526D 0x00 526E 0x00 526F 0x00 5270 to Reserved area (147 bytes) 0x00 52FF 0x00 5300 TIM2 0x00 5301 ...

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Memory and register map Address Block 0x00 5307 0x00 5308 0x00 5309 0x00 530A 0x00 530B 0x00 530C 0x00 530D 0x00 530E 0x00 530F 0x00 5310 0x00 5311 0x00 5312 0x00 5313 0x00 5314 0x00 5315 0x00 5316 0x00 5317 ...

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STM8S003K3 STM8S003F3 Address Block 0x00 5342 0x00 5343 0x00 5344 0x00 5345 0x00 5346 0x00 5347 0x00 5348 0x00 5349 to Reserved area (153 bytes) 0x00 53DF 0x00 53E0 to ADC1 0x00 53F3 0x00 53F4 to Reserved area (12 bytes) ...

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Memory and register map Address Block 0x00 5408 0x00 5409 0x00 540A 0x00 540B 0x00 540C 0x00 540D 0x00 540E 0x00 540F 0x00 5410 to Reserved area (1008 bytes) 0x00 57FF (1) Depends on the previous reset source. (2) Write ...

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STM8S003K3 STM8S003F3 Address Block 0x00 7F06 0x00 7F07 0x00 7F08 0x00 7F09 0x00 7F0A 0x00 7F0B to 0x00 7F5F 0x00 7F60 CPU 0x00 7F70 0x00 7F71 0x00 7F72 0x00 7F73 ITC 0x00 7F74 0x00 7F75 0x00 7F76 0x00 7F77 0x00 ...

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Memory and register map Address Block 0x00 7F98 0x00 7F99 0x00 7F9A 0x00 7F9B to 0x00 7F9F (1) Accessible by debug module only 38/100 Register label Register name DM_CSR1 DM debug module control/status register 1 DM_CSR2 DM debug module control/status ...

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STM8S003K3 STM8S003F3 7 Interrupt vector mapping IRQ Source Description no. block RESET Reset TRAP Software interrupt 0 TLI External top level interrupt 1 AWU Auto wake up from halt 2 CLK Clock controller 3 EXTI0 Port A external interrupts 4 ...

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Interrupt vector mapping IRQ Source Description no. block 23 TIM4 TIM4 update/ overflow 24 Flash EOP/WR_PG_DIS (1) Except PA1 40/100 Wakeup from halt mode - - Reserved DocID018576 Rev 3 STM8S003K3 STM8S003F3 Wakeup from Vector address active-halt mode - 0x00 ...

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STM8S003K3 STM8S003F3 8 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated block of the memory. Except for the ROP (read-out protection) byte, each ...

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Option bytes Option byte no. OPT1 OPT2 OPT3 42/100 Description Note: Refer to the family reference manual (RM0016) section on Flash/EEPROM memory readout protection for details. UBC[7:0] User boot code area 0x00: no UBC, no write-protection 0x01: Page 0 defined ...

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STM8S003K3 STM8S003F3 Option byte no. OPT4 OPT5 8.1 Alternate function remapping bits Table 13: STM8S003K3 alternate function remapping bits for 32-pin devices Option byte no. OPT2 Description 0: No reset generated on halt if WWDG active 1: Reset generated on ...

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Option bytes Option byte no. (1) Do not use more than one remapping option in the same port forbidden to enable both AFR1 and AFR0. (2) Refer to pinout description. Table 14: STM8S003F3 alternate function remapping bits for ...

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STM8S003K3 STM8S003F3 Option byte no. (1) Refer to pinout description. (2) Do not use more than one remapping option in the same port forbidden to enable both AFR1 and AFR0. Description Reserved AFR1 Alternate function remapping option 1 ...

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Electrical characteristics 9 Electrical characteristics 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...

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STM8S003K3 STM8S003F3 9.2 Absolute maximum ratings Stresses above those listed as ‘absolute maximum ratings’ may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure ...

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Electrical characteristics Symbol Ratings I Total current out of V VSS I IO Output current sunk by any I/O and control pin Output current source by any I/Os and control pin (3) (4) I INJ(PIN) Injected current on NRST pin ...

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STM8S003K3 STM8S003F3 9.3 Operating conditions Symbol Parameter f Internal CPU clock frequency CPU V Standard operating voltage DD (1) VCAP C : capacitance of EXT external capacitor ESR of external capacitor ESL of external capacitor ( Power dissipation ...

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Electrical characteristics Functionality not guaranteed in this area Table 19: Operating conditions at power-up/power-down Symbol Parameter V rise time rate DD t VDD V fall time rate DD t Reset release delay TEMP V Power-on reset threshold IT+ V Brown-out ...

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STM8S003K3 STM8S003F3 9.3.2 Supply current characteristics The current consumption is measured as described in 9.3.2.1 Total current consumption in run mode The MCU is placed under the following conditions: • All I/O pins in input mode with a static value ...

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Electrical characteristics (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. Table 21: Total current consumption with code execution in run mode at V Symbol Parameter Conditions f CPU 16 ...

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STM8S003K3 STM8S003F3 9.3.2.2 Total current consumption in wait mode Table 22: Total current consumption in wait mode at V Symbol Parameter Conditions CPU 16 MHz CPU MASTER Supply 125 kHz I current in DD(WFI) ...

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Electrical characteristics (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. 9.3.2.3 Total current consumption in active halt mode Table 24: Total current consumption in active halt mode at V ...

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STM8S003K3 STM8S003F3 Conditions Main voltage Symbol Parameter regulator (MVR) I DD(AH) Supply current in active halt mode I DD(AH) I DD(AH) Supply current in I active halt mode DD(AH) I DD(AH) (1) Data based on characterization results, not tested in ...

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Electrical characteristics Symbol Parameter (1) Data based on characterization results, not tested in production 9.3.2.5 Low power mode wakeup times Symbol Parameter Wakeup time from wait mode to run t WU(WFI) (3) mode Wakeup time active halt mode to run ...

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STM8S003K3 STM8S003F3 (3) Measured from interrupt event to interrupt vector fetch. (4) Configured by the REGAH bit in the CLK_ICKR register. (5) Configured by the AHALT bit in the FLASH_CR1 register. (6) Plus 1 LSI clock depending on synchronization. 9.3.2.6 ...

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Electrical characteristics (1) Data based on a differential MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production. (2) Data based on a differential I and not clocked and the on-chip peripheral when clocked and ...

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STM8S003K3 STM8S003F3 Figure 13: Typ I Figure 14: Typ I vs. V HSI RC osc, f DD(RUN) DD vs. V HSE user external clock, f DD(WFI) DD DocID018576 Rev 3 Electrical characteristics = 16 MHz CPU = 16 MHz CPU ...

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Electrical characteristics Figure 15: Typ I Figure 16: Typ I 9.3.3 External clock sources and timing characteristics HSE user external clock Subject to general operating conditions for V Table 31: HSE user external clock characteristics Symbol Parameter f User external ...

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STM8S003K3 STM8S003F3 (1) Data based on characterization results, not tested in production. V HSEH V HSEL HSE crystal/ceramic resonator oscillator The HSE clock can be supplied with MHz crystal/ceramic resonator oscillator. All the information given in ...

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Electrical characteristics ( approximately equivalent crystal Cload. (2) The oscillator selection can be optimized in terms of supply current using a high quality resonator with small R value. Refer to crystal manufacturer for more details ...

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STM8S003K3 STM8S003F3 Symbol Parameter ACC Accuracy of HSI HSI oscillator Accuracy of HSI oscillator (factory calibrated) t HSI oscillator su(HSI) wakeup time including calibration I HSI oscillator DD(HSI) power consumption (1) Refer to application note. (2) Data based on characterization ...

Page 64

Electrical characteristics Low speed internal RC oscillator (LSI) Subject to general operating conditions for V Symbol Parameter f Frequency LSI t LSI oscillator wake-up time su(LSI) I LSI oscillator power consumption DD(LSI) Figure 20: Typical LSI frequency variation vs V ...

Page 65

STM8S003K3 STM8S003F3 Flash program memory and data EEPROM Symbol Parameter V Operating voltage (all DD modes, execution/ write/erase) t Standard programming time prog (including erase) for byte/word/block (1 byte/ 4 bytes/64 bytes) Fast programming time for 1 block (64 bytes) ...

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Electrical characteristics (1) Data based on characterization results, not tested in production. (2) The physical granularity of the memory is 4 bytes, so cycling is performed on 4 bytes even when a write/erase operation addresses a single byte. 9.3.6 I/O ...

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STM8S003K3 STM8S003F3 Figure 21: Typical V Figure 22: Typical pull-up resistance vs V and temperatures DocID018576 Rev 3 Electrical characteristics @ 4 temperatures 67/100 ...

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Electrical characteristics Figure 23: Typical pull-up current vs V Symbol Parameter Output low level with 8 pins sunk V OL Output low level with 4 pins sunk Output high level with 8 pins sourced V OH Output high level with ...

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STM8S003K3 STM8S003F3 Symbol Parameter Output low level with 2 pins sunk V OL (1) Data based on characterization results, not tested in production Symbol Parameter Output low level with 8 pins sunk V OL Output low level with 4 pins ...

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Electrical characteristics 70/100 Figure 24: Typ (standard ports Figure 25: Typ 3.3 V (standard ports DocID018576 Rev 3 STM8S003K3 STM8S003F3 ...

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STM8S003K3 STM8S003F3 Figure 26: Typ. V Figure 27: Typ (true open drain ports 3.3 V (true open drain ports DocID018576 Rev 3 Electrical characteristics 71/100 ...

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Electrical characteristics 72/100 Figure 28: Typ (high sink ports Figure 29: Typ 3.3 V (high sink ports DocID018576 Rev 3 STM8S003K3 STM8S003F3 ...

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STM8S003K3 STM8S003F3 Figure 31: Typ. V Figure 30: Typ DocID018576 Rev 3 Electrical characteristics = 5 V (standard ports 3.3 V (standard ports) DD 73/100 ...

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Electrical characteristics Figure 33: Typ. V 9.3.7 Reset pin characteristics Subject to general operating conditions for V Symbol Parameter V IL(NRST) NRST input low 74/100 Figure 32: Typ ...

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STM8S003K3 STM8S003F3 Symbol Parameter (1) level voltage V IH(NRST) NRST input high level voltage V OL(NRST) NRST output low level voltage R PU(NRST) NRST pull-up (2) resistor t I FP(NRST) NRST input filtered (3) pulse t IN FP(NRST) NRST input ...

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Electrical characteristics Figure 34: Typical NRST V Figure 35: Typical NRST pull-up resistance vs V 76/100 and temperatures DocID018576 Rev 3 STM8S003K3 STM8S003F3 @ 4 temperatures DD ...

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STM8S003K3 STM8S003F3 Figure 36: Typical NRST pull-up current vs V The reset network shown in the following figure protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below V #unique_55/CD662 ...

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Electrical characteristics Symbol Parameter f 1/ SPI clock SCK t frequency c(SCK SCK SCK t c(SCK) t SPI clock rise and r(SCK) t fall time f(SCK) (3) t NSS setup time su(NSS) (3) t NSS hold time ...

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STM8S003K3 STM8S003F3 (1) Parameters are given by selecting 10 MHz I/O output frequency. (2) Data characterization in progress. (3) Values based on design simulation and/or characterization results, and not tested in production. (4) Min time is for the minimum time ...

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Electrical characteristics NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO INP UT MOSI OUTUT 1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD. 2 9.3 interface characteristics Symbol Parameter ...

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STM8S003K3 STM8S003F3 Symbol Parameter t STOP condition setup time su(STO) t STOP to START condition time w(STO:ST A) (bus free) C Capacitive load for each bus line b ( must be at least 8 MHz to achieve max ...

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Electrical characteristics Symbol Parameter f ADC clock frequency ADC V Conversion voltage range AIN C Internal sample and hold ADC capacitor (1) t Minimum sampling time S t Wake-up time from standby STAB t Minimum total conversion time CONV (including ...

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STM8S003K3 STM8S003F3 Symbol Parameter |E | Gain error Differential linearity error Integral linearity error L (1) Data based on characterization results, not tested in production. (2) ADC accuracy vs. negative injection current: Injecting negative ...

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Electrical characteristics Symbol Parameter |E | Gain error Differential linearity error Integral linearity error L (1) Data based on characterization results, not tested in production. (2) ADC accuracy vs. negative injection current: Injecting negative ...

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STM8S003K3 STM8S003F3 3. End point correlation line E = Total unadjusted error: maximum deviation between the actual and the ideal transfer T curves Offset error: deviation between the first actual transition and the first ideal one ...

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Electrical characteristics Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be recovered by applying a low state on the NRST pin or the oscillator pins for 1 second. To complete these trials, ESD stress ...

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STM8S003K3 STM8S003F3 Symbol Parameter SAE EMI level (1) Data based on characterisation results, not tested in production. 9.3.11.4 Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, DLU and LU) using specific measurement methods, the product is stressed ...

Page 88

... Parameter LU Static latch-up class (1) Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to class A it exceeds the JEDEC standard. B class strictly covers all the JEDEC criteria (international standard). 88/100 ...

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STM8S003K3 STM8S003F3 10 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ...

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Package information Dim. mm Min D3 E 8.800 E1 6.800 0.450 L1 k 0.0° ccc (1) Values in inches are converted from mm and rounded to 4 decimal digits 10.2 20-pin TSSOP package mechanical data aaa CP ...

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STM8S003K3 STM8S003F3 Table 52: 20-pin, 4.40 mm body, 0.65 mm pitch mechanical data Dim. mm Min A A1 0.050 A2 0.800 b 0.190 c 0.090 D 6.400 E 6.200 E1 4.300 e L 0.450 L1 k 0.0° aaa (1) Values ...

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Package information 10.3 20-lead UFQFPN package mechanical data Figure 46: 20-lead ultra thin fine pitch quad flat no-lead package outline (3x3) 1. Drawing is not to scale. Table 53: 20-lead ultra thin fine pitch quad flat no-lead package (3x3) mechanical ...

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STM8S003K3 STM8S003F3 Dim. mm Min ddd 0.050 (1) Values in inches are converted from mm and rounded to 4 decimal digits. inches Typ Max Min 0.0020 DocID018576 Rev 3 Package information (1) Typ Max 93/100 ...

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Thermal characteristics 11 Thermal characteristics The maximum chip junction temperature (T Operating conditions. The maximum chip-junction temperature, T the following equation Jmax Amax Where: • the maximum ambient temperature in °C Amax • ...

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STM8S003K3 STM8S003F3 The following example shows how to calculate the temperature range needed for a given application. Assuming the following application conditions: • Maximum ambient temperature T • mA, V DDmax • Maximum 20 I/Os used at ...

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Ordering information 12 Ordering information Figure 47: STM8S003x value line ordering information scheme 1. TSSOP and UFQFPN package. 2. LQFP package. For a list of available options (e.g. package, packing) and orderable part numbers or for further information on any ...

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... In addition, STM8 application development is supported by a low-cost in-circuit debugger/programmer. The STice is the fourth generation of full featured emulators from STMicroelectronics. It offers new advanced debugging capabilities including profiling and coverage to help detect and eliminate bottlenecks in application execution and dead code when fine tuning an application. ...

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STM8 development tools 13.2.1 STM8 toolset STM8 toolset with STVD integrated development environment and STVP programming software is available for free download at www.st.com/mcu. This package includes: ST Visual Develop – Full-featured integrated development environment from ST, featuring • Seamless ...

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STM8S003K3 STM8S003F3 14 Revision history Date 12-Jul-2011 09-Jan-2012 12-Jun-2012 Table 55: Document revision history Revision Changes 1 Initial revision. 2 Added N and t RW Flash program memory and data Updated Table 37: I/O static Updated notes ...

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... ST and the ST logo are trademarks or registered trademarks various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel ...

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