S9S08DZ60F2MLH Freescale Semiconductor, S9S08DZ60F2MLH Datasheet - Page 55

• Manufacturer Part Number: S9S08DZ60F2MLH
• Description: 8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
• Manufacturer: Freescale Semiconductor

Specifications of S9S08DZ60F2MLH

• Rohs: yes
• Core: HCS08
• Processor Series: MC9S08DZ60
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 60 KB
• Data Ram Size: 4 K
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT

4.5.4
The burst program command is used to program sequential bytes of data in less time than would be
required using the standard program command. This is possible because the high voltage to the Flash array
does not need to be disabled between program operations. Ordinarily, when a program or erase command
is issued, an internal charge pump associated with the Flash memory must be enabled to supply high
voltage to the array. Upon completion of the command, the charge pump is turned off. When a burst
program command is issued, the charge pump is enabled and remains enabled after completion of the burst
program operation if these two conditions are met:
The first byte of a series of sequential bytes being programmed in burst mode will take the same amount
of time to program as a byte programmed in standard mode. Subsequent bytes will program in the burst
Freescale Semiconductor
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•
The next burst program command sequence has begun before the FCCF bit is set.
The next sequential address selects a byte on the same burst block as the current byte being
programmed. A burst block in this Flash memory consists of 32 bytes. A new burst block begins
at each 32-byte address boundary.
Burst Program Execution
PROGRAM AND
ERASE FLOW
Figure 4-2. Program and Erase Flowchart
MC9S08DZ60 Series Data Sheet, Rev. 4
0
WRITE TO FLASH OR EEPROM TO
WRITE COMMAND TO FCMD
BUFFER ADDRESS AND DATA
TO LAUNCH COMMAND
AND CLEAR FCBEF
WRITE TO FCDIV
WRITE 1 TO FCBEF
CLEAR ERROR
FACCERR?
FPVIOL OR
FACCERR?
START
FCCF?
DONE
1
NO
(1)
(2)
0
YES
(2)
before checking FCBEF or FCCF.
(1)
Wait at least four bus cycles
after reset.
Required only once
ERROR EXIT
Chapter 4 Memory
55