74HC4066D-Q100,118 NXP Semiconductors, 74HC4066D-Q100,118 Datasheet
74HC4066D-Q100,118
Specifications of 74HC4066D-Q100,118
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74HC4066D-Q100,118 Summary of contents
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Quad single-pole single-throw analog switch Rev. 2 — 4 April 2013 1. General description The 74HC4066-Q100; 74HCT4066-Q100 is a quad single pole, single throw analog switch. Each switch features two input/output terminals (nY and nZ) and an active ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C 74HC4066D-Q100 74HCT4066D-Q100 40 C to +125 C 74HC4066PW-Q100 74HCT4066PW-Q100 40 C to +125 C 74HC4066BQ-Q100 74HCT4066BQ-Q100 4. Functional diagram 001aad269 Fig 1 ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning +&4 +&74 < < *1' DDD Fig 4. Pin configuration for SO14 and TSSOP14 5.2 Pin description Table 2. Pin description Symbol 1Z, 2Z, 3Z, 4Z 1Y, 2Y, 3Y, 4Y GND 1E, 2E, 3E 74HC_HCT4066_Q100 Product data sheet 74HC4066-Q100; 74HCT4066-Q100 Quad single-pole single-throw analog switch ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current ...
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... NXP Semiconductors 9. Static characteristics Table 6. R resistance per switch for types 74HC4066-Q100 and 74HCT4066-Q100 for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. ...
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... NXP Semiconductors GND --------- - Fig 6. Test circuit for measuring R Table 7. Static characteristics 74HC4066-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V the input voltage terminal, whichever is assigned as an input. ...
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... NXP Semiconductors Table 7. Static characteristics 74HC4066-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter I supply current ...
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... NXP Semiconductors Table 8. Static characteristics 74HCT4066-Q100 At recommended operating conditions; voltages are referenced to GND (ground = 0 V the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter I OFF-state leakage current ...
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... NXP Semiconductors 10. Dynamic characteristics Table 9. Dynamic characteristics 74HC4066-Q100 GND = ns unless specified otherwise; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. ...
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... NXP Semiconductors Table 10. Dynamic characteristics 74HCT4066-Q100 GND = ns unless specified otherwise; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. ...
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... NXP Semiconductors 11. Waveforms Fig 10. Input ( output ( input V output os V output os Measurement points are shown in Fig 11. Turn-on and turn-off times Table 11. Measurement points Type 74HC4066-Q100 74HCT4066-Q100 74HC_HCT4066_Q100 Product data sheet 74HC4066-Q100; 74HCT4066-Q100 input is t PLH output os ) propagation delays ...
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... NXP Semiconductors Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistor Test selection switch. Fig 12. Load circuitry for measuring switching times Table 12. Test data Test ...
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... NXP Semiconductors 12. Additional dynamic characteristics Table 13. Additional dynamic characteristics Recommended conditions and typical values; GND = the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter THD total harmonic distortion ...
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... NXP Semiconductors 0 (dB) −20 −40 −60 −80 −100 Isolation (OFF-state) b. Test circuit V = 4.5 V; GND = Fig 14. Isolation (OFF-state function of frequency 74HC_HCT4066_Q100 Product data sheet 74HC4066-Q100; 74HCT4066-Q100 0.1 μF nY/nZ nZ/ 600 k. L source All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 5 (dB) 0 − Typical 3 dB frequency response b. Test circuit V = 4.5 V; GND = Fig 15. 3 dB frequency response 74HC_HCT4066_Q100 Product data sheet 74HC4066-Q100; 74HCT4066-Q100 0.1 μF nY/nZ nZ/ k. L source All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors a. Circuit b. Crosstalk voltage Fig 16. Test circuit for measuring crosstalk voltage (between the digital input and the switch Fig 17. Test circuit for measuring crosstalk (between the switches) 74HC_HCT4066_Q100 Product data sheet 74HC4066-Q100; 74HCT4066-Q100 ...
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... NXP Semiconductors 13. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Abbreviations Table 14. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model CDM Charge-Device Model MIL Military 15. Revision history Table 15. Revision history Document ID Release date 74HC_HCT4066_Q100 v.2 20130404 • Modifications: • 74HC_HCT4066_Q100 v.1 20120712 ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 Additional dynamic characteristics . . . . . . . . 13 13 Package outline ...