24C01C-I/SN Microchip Technology, 24C01C-I/SN Datasheet - Page 9

• Manufacturer Part Number: 24C01C-I/SN
• Description: IC EEPROM 1KBIT 400KHZ 8SOIC
• Manufacturer: Microchip Technology

Specifications of 24C01C-I/SN

• Memory Size: 1K (128 x 8)
• Package / Case: 8-SOIC (3.9mm Width)
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Organization: 128 K x 8
• Interface Type: I2C
• Maximum Clock Frequency: 0.4 MHz
• Access Time: 1 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 4.5 V, 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

6.0
6.1
Following the Start signal from the master, the device
code (4 bits), the Chip Select bits (3 bits), and the R/W
bit, which is a logic low, is placed onto the bus by the
master transmitter. The device will acknowledge this
control byte during the ninth clock pulse. The next byte
transmitted by the master is the word address and will
be written into the Address Pointer of the 24C01C.
After receiving another Acknowledge signal from the
24C01C the master device will transmit the data word
to be written into the addressed memory location. The
24C01C acknowledges again and the master gener-
ates a Stop condition. This initiates the internal write
cycle, and during this time the 24C01C will not
generate Acknowledge signals (Figure 6-1).
6.2
The write control byte, word address and the first data
byte are transmitted to the 24C01C in the same way as
in a byte write. But instead of generating a Stop
condition, the master transmits up to 15 additional data
bytes to the 24C01C which are temporarily stored in
the on-chip page buffer and will be written into the
memory after the master has transmitted a Stop
condition.
FIGURE 6-1:
FIGURE 6-2:
© 2008 Microchip Technology Inc.
SDA Line
SDA Line
Bus Activity
Master
Bus Activity
Bus Activity
Master
Bus Activity
WRITE OPERATIONS
Byte Write
Page Write
S
S
T
A
R
T
S
T
A
R
T
S
BYTE WRITE
PAGE WRITE
Control
Byte
Control
Byte
A
C
K
Address (n)
Word
A
C
K
A
C
K
Address
Word
Data n
After the receipt of each word, the four lower order
Address Pointer bits are internally incremented by one.
The higher order four bits of the word address remains
constant. If the master should transmit more than 16
bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 6-2).
Note:
A
C
K
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes actually
being written. Physical page boundaries
start at addresses that are integer
multiples of the page buffer size (or ‘page
size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
A
C
K
Data n +1
Data
A
C
K
24C01C
Data n + 15
DS21201J-page 9
A
C
K
P
S
T
O
P
A
C
K
S
T
O
P
P