IDT70T3339S133BFI IDT, Integrated Device Technology Inc, IDT70T3339S133BFI Datasheet
IDT70T3339S133BFI
Specifications of IDT70T3339S133BFI
800-1378
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IDT70T3339S133BFI Summary of contents
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... Features: ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location ◆ High-speed data access – Commercial: 3.4 (200MHz)/3.6ns (166MHz)/ 4.2ns (133MHz)(max.) – Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.) ◆ Selectable Pipelined or Flow-Through output mode ◆ ...
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... The IDT70T3339/19/ high-speed 512/256/128k x 18 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Pin Configuration (3,4,5,6,9) 01/13/ TDI NC A (2) 17L INT NC TDO A (1) L 18L COL I/O ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Pin Configurations(con't) 01/13/ INT I TDO L SS COL NC V TDI PIPE I/O V DDQL 9R ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Pin Names Left Port Right Port CE CE Chip Enables (Input R/W R/W Read/Write Enable (Input Output Enable (Input) ...
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... Counter Set to last valid ADS load (n) I/O , UB, LB and OE and LB the rising edge of CLK, regardless of all other memory control signals including CE IL 6.42 6 Industrial and Commercial Temperature Ranges (1,2,3,4) Lower Byte I/O MODE 0-8 High-Z Deselected–Power Down High-Z Deselected–Power Down High-Z ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Maximum Operating Temperature and Supply Voltage Commercial Industrial NOTES: 1. This is the parameter TA. This is the "instant on" case temperature. Recommended DC Operating Conditions with V Symbol V V ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Absolute Maximum Ratings Symbol Rating V V Terminal Voltage TERM with Respect to GND DD ( Terminal Voltage TERM DDQ (V ) with Respect to GND ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter CE and CE I Dynamic Operating DD L Current (Both Outputs Disabled, (1) Ports Active ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM AC Test Conditions (V Input Pulse Levels (Address & Controls) Input Pulse Levels (I/Os) Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT ∆ tCD (Typical, ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing) Symbol (1) t Clock Cycle Time (Flow-Through) CYC1 (1) t Clock Cycle Time (Pipelined) CYC2 (1) t Clock ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Timing Waveform of Read Cycle for Pipelined Operation (2) (FT/PIPE = CH2 CLK ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Timing Waveform of a Multi-Device Pipelined Read t CYC2 t t CH2 CL2 CLK ADDRESS (B1 0(B1) DATA OUT(B1) t ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Timing Waveform of Left Port Write to Pipelined Right Port Read CLK "A" R/W "A " ADDRESS "A" MATC ...
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... CNTEN, and REPEAT = Addresses do not have to be accessed sequentially since ADS = V are for reference use only. 4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity. Timing Waveform of Pipelined Read-to-Write-to-Read ( OE Controlled) t CYC2 t t CH2 ...
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... Output state (High, Low, or High-impedance) is determined by the previous cycle control signals UB, LB, and ADS = V , CNTEN, and REPEAT = Addresses do not have to be accessed sequentially since ADS = V reference use only. 4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Timing Waveform of Pipelined Read with Address Counter Advance t CYC2 t CH2 CLK ADDRESS SAD HAD ADS CNTEN ( DATA ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Timing Waveform of Write with Address Counter Advance (Flow-through or Pipelined Inputs) t CYC2 t CH2 CLK ADDRESS (3) INTERNAL ADDRESS t t SAD HAD ADS ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Waveform of Interrupt Timing CLK R ADDRESS (3) L 7FFFF ( INS INT R ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Waveform of Collision Timing Both Ports Writing with Left Port Clock Leading CLK L t OFS ( ADDRESS L COL L CLK ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Timing Waveform - Entering Sleep Mode R/W Timing Waveform - Exiting Sleep Mode R/W OE DATA OUT (4) NOTES IH. 2. All timing is same for ...
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... Both ports writing - there is a risk that the two ports will interfere with each other, and the data stored in memory will not be a valid write from either port (it may essentially be a random combination of the two). Therefore, the collision flag is output on both ports ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Depth and Width Expansion The IDT70T3339/19/99 features dual chip enables (refer to Truth Table I) in order to facilitate rapid and simple depth expansion with no requirements for external logic. Figure ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM JTAG Timing Specifications t JF TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO TRST NOTES: 1. Device inputs = All device inputs except TDI, TMS, and TRST. 2. ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Identification Register Definitions Instruction Field Revision Number (31:28) IDT Device ID (27:12) IDT JEDEC ID (11:1) ID Register Indicator Bit (Bit 0) NOTE: 1. Device ID for IDT70T3319 is 0x334. Device ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Ordering Information XXXXX A 999 A Device Power Speed Package Type NOTES: 1. 166MHz I-Temp is not available in the BF-208 package. 2. 200Mhz is not available in the BF-208 package. ...
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IDT70T3339/19/99S High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM Datasheet Document History: 01/20/03: Initial Datasheet 04/25/03: Page 11 Added Capacitance Derating drawing Page 12 Changed t INS 11/11/03: Page 10 Updated power numbers in DC Electrical Characteristics table Page 12 ...