CY7C1019D-10VXI Cypress Semiconductor Corp, CY7C1019D-10VXI Datasheet - Page 6

• Manufacturer Part Number: CY7C1019D-10VXI
• Description: IC SRAM 1MBIT 10NS 32SOJ
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C1019D-10VXI

• Memory Size: 1M (128K x 8)
• Package / Case: 32-SOJ
• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Speed: 10ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 10 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 80 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 5 V
• Memory Configuration: 128K X 8
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOJ
• No. Of Pins: 32
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Density: 1Mb
• Access Time (max): 10ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 17b
• Package Type: SOJ
• Operating Temp Range: -40C to 85C
• Supply Current: 80mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1964-5; CY7C1019D-10VXI

Data Retention Characteristics
Data Retention Waveform
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
Read Cycle No. 2 (OE Controlled)
Notes
Document #: 38-05464 Rev. *F
V
I
t
t
12. Full device operation requires linear V
13. Device is continuously selected. OE, CE = V
14. WE is HIGH for Read cycle.
15. Address valid prior to or coincident with CE transition LOW.
CCDR
CDR
R
Parameter
DATA OUT
CURRENT
ADDRESS
DR
[12]
DATA OUT
ADDRESS
SUPPLY
[3]
V
V
OE
CE
CC
CE
CC
V
Data Retention Current
Chip Deselect to Data Retention Time
Operation Recovery Time
CC
for Data Retention
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
Description
PU
t
LZCE
CC
[14, 15]
ramp from V
t
t
ACE
LZOE
IL
.
(Over the Operating Range)
50%
t
OHA
t
t
DOE
CDR
4.5V
DR
to V
t
[13, 14]
CC(min)
AA
V
V
CC
IN
t
> 50 s or stable at V
RC
> V
= V
DATA RETENTION MODE
CC
DR
– 0.3V or V
t
= 2.0V, CE > V
RC
RC
V
DR
Conditions
>
CC(min)
2V
DATA VALID
IN
> 50 s.
< 0.3V
CC
– 0.3V,
t
HZOE
DATA VALID
4.5V
t
R
t
HZCE
Min
t
2.0
t
PD
RC
0
50%
CY7C1019D
IMPEDANCE
Max
3
HIGH
Page 6 of 13
Unit
mA
ns
ns
ICC
ISB
V
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