CY7C09369V-12AC Cypress Semiconductor Corp, CY7C09369V-12AC Datasheet - Page 15

• Manufacturer Part Number: CY7C09369V-12AC
• Description: IC SRAM 288KBIT 12NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09369V-12AC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 288K (16K x 18)
• Speed: 12ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1448

Read/Write and Enable Operation
Address Counter Control Operation
Notes:
Document #: 38-06056 Rev. **
34. “X” = “Don’t Care”, “H” = V
35. ADS, CNTEN, CNTRST = “Don’t Care”.
36. OE is an asynchronous input signal.
37. When CE changes state In the pipelined mode, deselection and read happen in the following clock cycle.
38. CE
39. Data shown for flow-through mode; pipelined mode output will be delayed by one cycle.
40. Counter operation is independent of CE
Address
OE
A
H
X
X
X
X
X
X
L
n
0
and OE = V
Previous
Address
A
A
X
X
CLK
IL
n
n
; CE
X
1
and R/W = V
IH
CLK
, “L” = V
Inputs
CE
H
X
L
L
L
IL
ADS
IH
.
0
H
H
.
X
L
0
and CE
CNTEN
1
.
H
X
X
[ 34 , 35 , 36 ]
L
CE
X
H
H
H
L
[ 34 , 38 , 39 , 40 ]
1
CNTRST
H
H
H
L
R/W
X
X
H
X
L
D
D
D
D
out(n+1)
I/O
out(0)
out(n)
out(n)
I/O
Outputs
High-Z
High-Z
High-Z
Increment
D
0
D
Mode
Reset
OUT
–I/O
Load
Hold
IN
17
Counter Reset to Address 0
Address Load into Counter
External Address Blocked—Counter
Disabled
Counter Enabled—Internal Address
Generation
CY7C09269V/79V/89V
CY7C09369V/79V/89V
Deselected
Deselected
Write
Read
Outputs Disabled
[35]
Operation
[37]
[37]
Operation
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