CY7C09369V-12AC Cypress Semiconductor Corp, CY7C09369V-12AC Datasheet - Page 9

IC SRAM 288KBIT 12NS 100LQFP

CY7C09369V-12AC

Manufacturer Part Number
CY7C09369V-12AC
Description
IC SRAM 288KBIT 12NS 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C09369V-12AC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
288K (16K x 18)
Speed
12ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1448

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C09369V-12AC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C09369V-12AC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Waveforms
Bank Select Pipelined Read
Left Port Write to Flow-Through Right Port Read
Notes:
Document #: 38-06056 Rev. **
ADDRESS
20. In this depth expansion example, B1 represents Bank #1 and B2 is Bank #2; Each Bank consists of one Cypress dual-port device from this datasheet.
21. UB, LB, OE and ADS = V
22. The same waveforms apply for a right port write to flow-through left port read.
23. CE
24. OE = V
25. It t
ADDRESS
DATA
DATA
ADDRESS
ADDRESS
DATA
ADDRESS
until t
DATA
CCS
CE
CE
OUT(B2)
OUT(B1)
0
, UB, LB, and ADS = V
CLK
CLK
R/W
CCS
CLK
R/W
OUTR
0(B1)
0(B2)
(B1)
IL
(B2)
maximum specified, then data from right port READ is not valid until the maximum specified for t
INL
for the Right Port, which is being read from. OE = V
+ t
L
R
R
R
L
L
L
(B1)
CD1
= ADDRESS
t
t
t
t
. t
SA
SC
SA
SC
CWDD
t
t
t
SW
SA
SD
does not apply in this case.
A
IL
A
; CE
IL
0
0
(B2)
; CE
t
CH2
MATCH
VALID
.
1(B1)
(continued)
[ 20 , 21 ]
1
, CNTEN, and CNTRST = V
t
t
t
t
SW
SA
t
t
t
t
MATCH
CYC2
CCS
, CE
HA
HC
HA
HC
t
DC
1(B2)
t
CL2
t
t
t
t
HW
HA
t
HW
HA
HD
, R/W, CNTEN, and CNTRST = V
A
A
1
1
t
CWDD
t
CD2
t
CD1
[ 22 , 23 , 24 , 25 ]
IH
t
SC
IH
for the Left Port, which is being written to.
.
D
t
0
SC
A
A
2
2
t
t
DC
HC
IH
.
t
HC
t
CD2
MATCH
VALID
NO
D
MATCH
A
A
1
3
t
NO
3
DC
t
t
CKLZ
CKHZ
t
t
CD2
DC
CWDD
. If t
CY7C09269V/79V/89V
CY7C09369V/79V/89V
CCS
t
CD1
>maximum specified, then data is not valid
D
A
A
4
2
4
t
t
t
CKHZ
CD2
CKLZ
D
3
A
A
Page 9 of 19
VALID
5
t
5
CKLZ
t
t
CKHZ
CD2
D
4

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