CY7C09369V-12AC Cypress Semiconductor Corp, CY7C09369V-12AC Datasheet - Page 8

• Manufacturer Part Number: CY7C09369V-12AC
• Description: IC SRAM 288KBIT 12NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09369V-12AC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 288K (16K x 18)
• Speed: 12ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1448

Switching Waveforms
Read Cycle for Flow-Through Output (FT/PIPE = V
Read Cycle for Pipelined Operation (FT/PIPE = V
Notes:
Document #: 38-06056 Rev. **
16. OE is asynchronously controlled; all other inputs are synchronous to the rising clock edge.
17. ADS = V
18. The output is disabled (high-impedance state) by CE
19. Addresses do not have to be accessed sequentially since ADS = V
ADDRESS
ADDRESS
DATA
DATA
IL
CLK
R/W
CE
CE
OUT
CLK
R/W
CE
CE
OE
, CNTEN and CNTRST = V
OUT
OE
0
1
0
1
t
t
t
t
t
t
SC
SW
SA
SC
SW
SA
A
A
n
n
t
t
t
t
t
t
t
HC
HW
HA
t
CH2
HC
HW
HA
CH1
IH
t
1 Latency
CKLZ
.
t
CD1
t
CYC2
t
CYC1
t
CKLZ
t
CL2
t
0
CL1
=V
IH
A
A
or CE
n+1
n+1
IH
IL
)
[ 16 , 17 , 18 , 19 ]
1
)
t
Q
IL
DC
[ 16 , 17 , 18 , 19 ]
= V
t
n
constantly loads the address on the rising edge of the CLK. Numbers are for reference only.
CD2
IL
following the next rising edge of the clock.
Q
A
n
A
n+2
n+2
Q
t
OHZ
n+1
t
DC
CY7C09269V/79V/89V
CY7C09369V/79V/89V
Q
t
t
t
SC
SC
t
OE
n+1
t
OLZ
OHZ
A
A
n+3
n+3
t
OLZ
Q
t
DC
t
n+2
t
HC
HC
t
OE
t
CKHZ
Page 8 of 19
Q
n+2