24LCS22A-I/SN Microchip Technology, 24LCS22A-I/SN Datasheet - Page 13

no-image

24LCS22A-I/SN

Manufacturer Part Number
24LCS22A-I/SN
Description
IC EEPROM 2KBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 24LCS22A-I/SN

Memory Size
2K (256 x 8)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
256 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.1 MHz
Access Time
3500 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
24LCS22A-I/SNG
24LCS22A-I/SNG
24LCS22AI/SN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
24LCS22A-I/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
24LCS22A-I/SN
Manufacturer:
MIC
Quantity:
20 000
FIGURE 7-2:
FIGURE 7-3:
7.3
Sequential reads are initiated in the same way as a
random read except that after the 24LCS22A transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24LCS22A to transmit the next sequentially
addressed 8-bit word (Figure 7-3).
To provide sequential reads the 24LCS22A contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
© 2009 Microchip Technology Inc.
Master
SDA Line
Bus Activity
Bus Activity
Sequential Read
SDA Line
Bus Activity
Master
Bus Activity
Control
Byte
A
C
K
RANDOM READ
SEQUENTIAL READ
S
T
A
R
T
S
1 0 1 0 0 0 0 0
Data n
Control
Byte
A
C
K
A
C
K
Data n + 1
Address
Word
C
A
K
7.4
The 24LCS22A employs a V
circuit which disables the internal erase/write logic if the
V
The SDA, SCL and VCLK inputs have Schmitt Trigger
and filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
CC
A
C
K
S
T
A
R
T
S
Data n + 2
is below 1.5 volts at nominal conditions.
1
0
Noise Protection
1
Control
Byte
0
0
0
A
C
K
0
1
A
C
K
24LCS22A
CC
Data n
threshold detector
Data n + x
DS21682E-page 13
N
O
C
A
K
S
T
O
P
P
O
N
A
C
K
S
T
O
P
P

Related parts for 24LCS22A-I/SN