PBSS5260PAP,115 NXP Semiconductors, PBSS5260PAP,115 Datasheet

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PBSS5260PAP,115

Manufacturer Part Number
PBSS5260PAP,115
Description
Transistors Bipolar - BJT 60V 2A PNP/PNP lo VCEsat transistor
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PBSS5260PAP,115

Rohs
yes
Configuration
Dual
Transistor Polarity
PNP
Collector- Base Voltage Vcbo
- 60 V
Collector- Emitter Voltage Vceo Max
- 60 V
Emitter- Base Voltage Vebo
- 7 V
Collector-emitter Saturation Voltage
- 100 mV
Maximum Dc Collector Current
- 3 A
Gain Bandwidth Product Ft
100 MHz
Dc Collector/base Gain Hfe Min
170
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Package / Case
DFN2020-6
Continuous Collector Current
- 2 A
Dc Current Gain Hfe Max
250
Maximum Power Dissipation
1450 mW
Minimum Operating Temperature
- 55 C
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1. General description
2. Features and benefits
3. Applications
4. Quick reference data
Table 1.
Symbol
Per transistor
V
I
I
Per transistor
R
C
CM
CEO
CEsat
Quick reference data
Parameter
collector-emitter
voltage
collector current
peak collector current
collector-emitter
saturation resistance
PNP/PNP low V
medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.
NPN/PNP complement: PBSS4260PANP. NPN/NPN complement: PBSS4260PAN.
PBSS5260PAP
60 V, 2 A PNP/PNP low VCEsat (BISS) transistor
12 December 2012
Very low collector-emitter saturation voltage V
High collector current capability I
High collector current gain h
Reduced Printed-Circuit Board (PCB) requirements
High efficiency due to less heat generation
AEC-Q101 qualified
Load switch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
Conditions
open base
single pulse; t
I
t
CEsat
C
p
≤ 300 µs; δ ≤ 0.02 ; T
= -1 A; I
Breakthrough In Small Signal (BISS) transistor in a leadless
B
= -100 mA; pulsed;
p
≤ 1 ms
FE
at high I
C
amb
and I
= 25 °C
C
CM
CEsat
Min
-
-
-
-
Product data sheet
Typ
-
-
-
-
Max
-60
-2
-3
250
Unit
V
A
A

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PBSS5260PAP,115 Summary of contents

Page 1

PBSS5260PAP PNP/PNP low VCEsat (BISS) transistor 12 December 2012 1. General description PNP/PNP low V medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package. NPN/PNP complement: PBSS4260PANP. NPN/NPN complement: PBSS4260PAN. 2. Features and benefits • Very ...

Page 2

... NXP Semiconductors 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 E1 emitter TR1 2 B1 base TR1 3 C2 collector TR2 4 E2 emitter TR2 5 B2 base TR2 6 C1 collector TR1 7 C1 collector TR1 8 C2 collector TR2 6. Ordering information Table 3. Ordering information Type number ...

Page 3

... NXP Semiconductors Symbol Parameter I peak base current BM P total power dissipation tot Per device P total power dissipation tot T junction temperature j T ambient temperature amb T storage temperature stg [1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint. ...

Page 4

... NXP Semiconductors (1) 4-layer PCB 70 µm, mounting pad for collector 1 cm (2) FR4 PCB 70 µm, mounting pad for collector 1 cm (3) 4-layer PCB 70 µm, standard footprint (4) 4-layer PCB 35 µm, mounting pad for collector 1 cm (5) FR4 PCB 35 µm, mounting pad for collector 1 cm (6) 4-layer PCB 35 µm, standard footprint (7) FR4 PCB 70 µ ...

Page 5

... NXP Semiconductors Symbol Parameter Per device R thermal resistance th(j-a) from junction to ambient [1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm [3] Device mounted on 4-layer PCB 35 µ ...

Page 6

... NXP Semiconductors th(j-a) (K/W) duty cycle = 1 0. 0.5 0.33 0.2 0.1 0.05 10 0.02 0. FR4 PCB 35 µm, mounting pad for collector 1 cm Fig. 3. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values th(j-a) (K/W) duty cycle = 1 0.75 2 0.5 10 0.33 0.2 0.1 0.05 10 0.02 0. 4-layer PCB 35 µ ...

Page 7

... NXP Semiconductors th(j-a) (K/W) duty cycle = 1 0. 0.5 0.33 0.2 0.1 10 0.05 0.02 0. 4-layer PCB 35 µm, mounting pad for collector 1 cm Fig. 5. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values th(j-a) duty cycle = 1 (K/W) 0.75 0 0.33 0.2 0.1 0.05 10 0.02 0. FR4 PCB 70 µ ...

Page 8

... NXP Semiconductors th(j-a) (K/W) duty cycle = 1 2 0.75 10 0.5 0.33 0.2 0.1 10 0.05 0.02 0. FR4 PCB 70 µm, mounting pad for collector 1 cm Fig. 7. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values th(j-a) (K/W) duty cycle = 1 0. 0.5 0.33 0.2 0.1 0.05 10 0.02 0. 4-layer PCB 70 µ ...

Page 9

... NXP Semiconductors 2 10 duty cycle = 1 0.75 0.5 Z th(j-a) (K/W) 0.33 0.2 10 0.1 0.05 0.02 0. 4-layer PCB 70 µm, mounting pad for collector 1 cm Fig. 9. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 10. Characteristics Table 7. Characteristics Symbol Parameter Per transistor I collector-base cut-off ...

Page 10

... NXP Semiconductors Symbol Parameter R collector-emitter CEsat saturation resistance V base-emitter saturation BEsat voltage V base-emitter turn-on BEon voltage t delay time d t rise time r t turn-on time on t storage time s t fall time f t turn-off time off f transition frequency T C collector capacitance c 500 h FE ...

Page 11

... NXP Semiconductors -1 (V) (1) -0.8 (2) -0.4 (3) 0.0 -1 - − ( −55 °C amb ( °C amb ( 100 °C amb Fig. 12. Base-emitter voltage as a function of collector current; typical values -10 V CEsat ( -10 (1) (2) (3) -2 -10 -1 - 100 °C ...

Page 12

... NXP Semiconductors CEsat (Ω - 100 °C amb ( °C amb ( −55 °C amb Fig. 16. Collector-emitter saturation resistance as a function of collector current; typical values PBSS5260PAP Product data sheet aaa-000814 (1) (2) ( -10 ...

Page 13

... NXP Semiconductors 11. Test information - Fig. 18. BISS transistor switching time definition oscilloscope Fig. 19. Test circuit for switching times 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications ...

Page 14

... NXP Semiconductors 12. Package outline Fig. 20. Package outline DFN2020-6 (SOT1118) 13. Soldering 0.875 2.25 0.875 Fig. 21. Reflow soldering footprint for DFN2020-6 (SOT1118) 14. Revision history Table 8. Revision history Data sheet ID Release date PBSS5260PAP v.1 20121212 PBSS5260PAP Product data sheet 2.1 1.9 1.1 0.9 0.77 0. (2×) 2.1 0.54 1.9 0. (2×) 0.3 0.2 Dimensions in mm 2.1 0.65 0.65 0.49 0.49 0.35 0.72 (6×) (2× ...

Page 15

... PBSS5260PAP Product data sheet PNP/PNP low VCEsat (BISS) transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory ...

Page 16

... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...

Page 17

... NXP Semiconductors 16. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 9 11 Test information ................................................... 13 11.1 Quality information ......................................... 12 Package outline ................................................... 14 13 Soldering .............................................................. 14 14 Revision history ...

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