MT48LC8M16LFB4-8 IT:G Micron Technology Inc, MT48LC8M16LFB4-8 IT:G Datasheet - Page 62

• Manufacturer Part Number: MT48LC8M16LFB4-8 IT:G
• Description: IC SDRAM 128MBIT 125MHZ 54VFBGA
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48LC8M16LFB4-8 IT:G

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 19/8/7ns
• Maximum Clock Rate: 125MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 100mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 42:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. L 10/07 EN
DQMU, DQML
COMMAND
A0–A9, A11
Self Refresh Mode
BA0, BA1
Notes:
CKE
A10
CLK
DQ
High-Z
Precharge all
t CKS
active banks
t CMS
SINGLE BANK
t
PRECHARGE
ALL BANKS
AS
BANK(S)
1. No maximum time limit for self refresh.
2.
3. As a general rule, any time self refresh is exited, the DRAM may not reenter the self refresh
T0
t CKH
3b.
t CMH
t
3a. The DRAM has been in the self refresh mode for a minimum of 64ms prior to exiting.
AH
3c. At least two AUTO REFRESH commands are performed during each 15.625µs interval
t CK
t
mode until all rows have been refreshed via the AUTO REFRESH command at the distrib-
uted refresh rate, (
allowed. Self refresh mode may be reentered any time after exiting if the following condi-
tions are all met:
XSR requires a minimum of 2 clocks regardless of frequency or timing.
t
while the DRAM remains out of the self refresh mode. See Table 17 on page 52.
XSR has not been violated.
t RP
T1
NOP
t CH
Enter self refresh mode
t CKS
t CL
REFRESH
t
REF/number of rows), or faster. However, the following exception is
AUTO
T2
> t RAS
CLK stable prior to exiting
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
)
)
)
)
)
(
(
)
(
(
(
(
(
(
(
)
)
(
)
(
)
(
)
(
)
(
)
)
)
)
)
)
(
(
)
)
62
(
)
)
1
)
self refresh mode
(Restart refresh time base)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Exit self refresh mode
t
RAS (MAX) only applies to non-self refresh mode.
Tn + 1
NOP
t XSR
128Mb: x16, x32 Mobile SDRAM
(
(
(
(
(
(
(
(
(
)
)
(
)
(
)
(
)
(
)
)
)
(
)
2
)
)
)
)
(
(
)
(
(
(
(
(
(
)
)
(
)
(
)
(
)
(
(
)
)
(
)
)
)
)
)
)
)
To + 1
©2001 Micron Technology, Inc. All rights reserved.
To + 2
REFRESH
AUTO
Timing Diagrams
DON’T CARE