MT48H32M16LFCJ-75 L IT:A TR Micron Technology Inc, MT48H32M16LFCJ-75 L IT:A TR Datasheet - Page 34

• Manufacturer Part Number: MT48H32M16LFCJ-75 L IT:A TR
• Description: IC SDRAM 512MBIT 133MHZ 54VBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H32M16LFCJ-75 L IT:A TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1331-2

PRECHARGE
Figure 25:
Power-Down
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. J 2/08 EN
PRECHARGE Command
Fixed-length WRITE bursts can be truncated with the BURST TERMINATE command.
When truncating a WRITE burst, the input data applied coincident with the BURST
TERMINATE command will be ignored. The last data written (provided that DQM is
LOW at that time) will be the input data applied one clock previous to the BURST
TERMINATE command. This is shown in Figure 24 on page 33, where data n is the last
desired data element of a longer burst.
The PRECHARGE command (see Figure 25 on page 34) is used to deactivate the open
row in a particular bank or the open row in all banks. The bank(s) will be available for a
subsequent row access some specified time (
issued. Input A10 determines whether one or all banks are to be precharged, and in the
case where only one bank is to be precharged, inputs BA0, BA1 select the bank. When all
banks are to be precharged, inputs BA0, BA1 are treated as “Don’t Care.” Once a bank
has been precharged, it is in the idle state and must be activated prior to any READ or
WRITE commands being issued to that bank.
A0–A9, A11, A12
Power-down occurs if CKE is registered LOW coincident with a NOP or COMMAND
INHIBIT when no accesses are in progress. If power-down occurs when all banks are
idle, this mode is referred to as precharge power-down; if power-down occurs when
there is a row active in any bank, this mode is referred to as active power-down. Entering
power-down deactivates the input and output buffers, excluding CKE, for maximum
power savings while in standby. The device may not remain in the power-down state
longer than the refresh period (64ms) since no REFRESH operations are performed in
this mode.
BA0,1
RAS#
CAS#
WE#
CKE
A10
CLK
CS#
HIGH
VALID ADDRESS
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Bank Selected
All Banks
ADDRESS
34
BANK
DON’T CARE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RP) after the precharge command is
©2005 Micron Technology, Inc. All rights reserved.
Operations