CY7C1350B-143AC Cypress Semiconductor Corp, CY7C1350B-143AC Datasheet - Page 11

• Manufacturer Part Number: CY7C1350B-143AC
• Description: IC SRAM 4.5MBIT 143MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1350B-143AC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 4.5M (128K x 36)
• Speed: 143MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1100

Document #: 38-05045 Rev. *A
Burst Sequences
Switching Waveforms
ADDRESS
ADV/LD
BWS
CE
CLK
Data-
In/Out
WE
[3:0]
t
The combination of WE & BWS
CE is the combination of CE
the device. Any chip enable can deselect the device. RAx stands for Read Address X, WA stands for
Write Address X, Dx stands for Data-in for location X, Qx stands for Data-out for location X. CEN held
LOW. During burst writes, byte writes can be conducted by asserting the appropriate BWS
Burst order determined by the state of the MODE input. CEN held LOW. OE held LOW.
ALS
t
Device
originally
deselected
CES
t
WS
RA1
t
t
CEH
WH
t
CLZ
t
ALH
(continued)
t
CO
t
DOH
Out
Q1
1
PRELIMINARY
t
, CE
t
CH
CO
[3:0]
= DON’T CARE
2,
t
Q1+1
CL
Out
define a write cycle (see Write Cycle Description table).
and CE
t
t
3
WS
CYC
. All chip enables need to be active in order to select
t
Q1+2
AS
WA2
Out
t
WH
t
AH
= UNDEFINED
Q1+3
Out
t
CHZ
t
DS
D2
In
t
DH
D2+1
In
D2+2
RA3
In
[3:0]
input signals.
D2+3
CY7C1350B
In
t
CLZ
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Q3
Out