VIPER53DIP-E STMicroelectronics, VIPER53DIP-E Datasheet - Page 14

• Manufacturer Part Number: VIPER53DIP-E
• Description: IC OFFLINE SWIT PWM CM OTP 8DIP
• Manufacturer: STMicroelectronics
• Series: VIPER™r
• Type: Pulse Width Modulator Controllerr

Specifications of VIPER53DIP-E

• Output Isolation: Isolated
• Frequency Range: 93 ~ 300kHz
• Voltage - Input: 8.4 ~ 19 V
• Voltage - Output: 620V
• Power (watts): 30W
• Operating Temperature: 25°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Current, Supply: 9 mA
• Frequency, Oscillator: 100 kHz
• Package Type: DIP-8
• Regulator Type: Switching
• Resistance, Thermal, Junction To Case: 20 °C/W
• Temperature, Operating, Range: -40 to +150 °C
• Time, Fall: 100 ns
• Time, Rise: 50 ns
• Voltage, Supply: 13 V
• Power Switch Family: VIPer53DIP
• Input Voltage: 0 to 19V
• Power Switch On Resistance: 900mOhm
• Output Current: 1.6A
• Number Of Outputs: Single
• Mounting: Through Hole
• Supply Current: 9mA
• Operating Temperature (min): -40C
• Operating Temperature (max): 150C
• Operating Temperature Classification: Automotive
• Pin Count: 8
• Mounting Style: Through Hole
• For Use With: 497-8435 - BOARD EVAL FOR VIPER53 28W497-6458 - BOARD EVAL BASED ON VIPER53-E497-6262 - BOARD REF SGL VIPER53 90-264VAC497-5866 - EVAL BOARD 24W NEG OUT VIPER53E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6171-5

VIPer53DIP / VIPer53SP
provides a soft start-up of the converter. The rising
speed of the output voltage can be set through the
value of C7. C4 and C6 values must be adjusted
accordingly in order to ensure a correct start-up.
CURRENT MODE TOPOLOGY
The VIPer53 implements the conventional current
mode control method for regulating the output
voltage. This kind of feedback includes two nested
regulation loops:
The inner loop controls the peak primary current
cycle by cycle. When the Power MOSFET output
transistor is on, the inductor current (primary side
of the transformer) is monitored with a SenseFET
technique and converted into a voltage V
V
This structure is completely integrated as shown
on the Block Diagram of page 1, with the current
amplifier, the PWM comparator, the blanking time
function and the PWM latch. The following formula
gives the peak current in the Power MOSFET
according to the compensation voltage:
I
The outer loop defines the level at which the inner
loop regulates peak current in the power switch.
For this purpose, V
the error amplifier (Either the internal one in
primary feedback configuration or a TL431 through
an
configuration, see figures 14 and 15) and is set
accordingly the peak drain current for each
switching cycle.
As the inner loop regulates the peak primary
current in the primary side of the transformer, all
input voltage changes are compensated for before
impacting the output voltage. This results in an
improved line regulation, instantaneous correction
to line changes and better stability for the voltage
regulation loop.
Current mode topology also provides a good
converter start-up control. As the compensation
voltage can be controlled to increase slowly during
the start-up phase, the peak primary current will
follow this soft voltage slope to provide a smooth
output voltage rise, without any overshoot. The
simpler voltage mode structure which only controls
the duty cycle, leads generally to high currents at
start-up with the risk of transformer saturation. The
compensation pin can also be used to limit the
current capability of the device (See Current
Limitation section).
An integrated blanking filter inhibits the PWM
comparator output for a short time after the
integrated Power MOSFET is switched on. This
function
termination of the switching pulse in the case of
14/24
Dpeak
S
reaches V
optocoupler
=
V
--------------------------------------------- -
prevents
C OMP
COMP
H
COM P
–
V
, the power switch is turned off.
COMP
COMPos
in
anomalous
is driven by the output of
secondary
or
premature
feedback
S
. When
current spikes caused by primary side transformer
capacitance or secondary side rectifier reverse
recovery time when working in continuous mode.
STANDBY MODE
The device implements a special feature to
address the low load condition. The corresponding
function described hereafter consists of reducing
the switching frequency by going into burst mode,
with the following benefits:
– It reduces the switching losses, thus providing
– It allows the regulation of the output voltage,
For this purpose, a comparator monitores the
COMP pin voltage, and maintains the PWM latch
and the Power MOSFET in the off state as long as
V
on page 1). If the output load requires a duty cycle
below the one defined by the minimum turn on of
the device, the error amplifier decreases its output
voltage until it reaches this 0.5 V threshold
(V
completely off for some cycles, and resumes
normal operation as soon as V
0.5 V. The output voltage is regulated in burst
mode. The corresponding ripple is not higher than
the nominal one at full load.
In addition, the minimum turn on time which
defines the frontier between normal operation and
burst mode changes according to V
Below 1 V (V
to 400 ns, whereas it is 150 ns for higher voltages
(See figure 11). The minimum turn on times
resulting from these values are respectively 600 ns
and 350 ns, when taking into account internal
propagation time. This brutal change induces an
hysteresis between normal operation and burst
mode as shown on figure 16.
When the output power decreases, the system
reaches point 2 where V
The minimum turn on time passes immediately
from 350 ns to 600 ns, exceeding the effective turn
on time that should be needed at such output
power level. Therefore the regulation loop will
quickly drive V
to pass into burst mode and to control the output
voltage. The corresponding hysteresis can be
seen on the switching frequency which passes
from F
frequency set by the components connected to the
OSC pin, to F
COMP
COMPoff
low consumption on the mains lines. The device
is compliant with “Blue Angel” and other similar
standards, requiring less than 0.5 W of input
power when in standby.
even if the load corresponds to a duty cycle that
the device is not able to generate because of the
internal blanking time, and associated minimum
turn on.
SWnom
remains below 0.5 V (See Block Diagram
).
COMPbl
The
COMP
SWstby
which is the normal switching
Power
), the blanking time increases
to V
. Note that this frequency is
COMPoff
COMP
MOSFET
COMP
(Point 3) in order
equals V
is higher than
COMP
can
COMPbl
value.
be
.