PCF8566P,112 NXP Semiconductors, PCF8566P,112 Datasheet - Page 34

• Manufacturer Part Number: PCF8566P,112
• Description: IC LCD DVR UNVRSL LOW-MUX 40-DIP
• Manufacturer: NXP Semiconductors

Specifications of PCF8566P,112

• Package / Case: 40-DIP (0.600", 15.24mm)
• Display Type: LCD
• Configuration: 7 Segment + DP, 14 Segment (24 Segment)
• Interface: I²C
• Current - Supply: 30µA
• Voltage - Supply: 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Number Of Digits: 12
• Number Of Segments: 96
• Maximum Clock Frequency: 315 KHz
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Maximum Supply Current: 90 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1069-5; 933865310112; PCF8566PN

NXP Semiconductors
PCF8566_7
Product data sheet
Fig 26. Cascaded PCF8566 configuration
V
V
V
LCD
DD
SS
CONTROLLER
PROCESSOR/
MICRO-
MICRO-
HOST
The SYNC line is provided to maintain the correct synchronization between all cascaded
PCF8566s. This synchronization is guaranteed after the power-on reset. The only time
that SYNC is likely to be needed is if synchronization is accidentally lost (e.g. by noise in
adverse electrical environments or by defining a multiplex mode when PCF8566s with
differing SA0 levels are cascaded).
SYNC is organized as an input/output pin; the output selection being realized as an
open-drain driver with an internal pull-up resistor. A PCF8566 asserts the SYNC line at
the onset of its last active backplane signal and monitors the SYNC line at all other times.
If synchronization in the cascade is lost, it is restored by the first PCF8566 to assert
SYNC. The timing relationship between the backplane waveforms and the SYNC signal
for the various drive modes of the PCF8566 are shown in
R
2 C
t
rise
bus
Rev. 07 — 25 February 2009
SYNC
SYNC
SDA
SCL
CLK
OSC
SDA
OSC
SCL
CLK
1
2
3
4
6
1
2
3
4
6
7
7
A0
A0
5
V
8
8
5
DD
PCF8566
PCF8566
A1
V
A1
DD
9
9
A2
A2
12
12
Universal LCD driver for low multiplex rates
V
V
10
10
17 to 40
13 to 16
17 to 40
13 to 16
LCD
LCD
SA0
SA0
11
11
V
V
SS
SS
24 segment drives
24 segment drives
4 backplanes
BP0 to BP3
(open-circuit)
BP0 to BP3
Figure
27.
LCD PANEL
(up to 1536
elements)
PCF8566
© NXP B.V. 2009. All rights reserved.
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