LTC4257IS8 Linear Technology, LTC4257IS8 Datasheet - Page 16

IC CONTROLLER POE INTERFAC 8SOIC

LTC4257IS8

Manufacturer Part Number
LTC4257IS8
Description
IC CONTROLLER POE INTERFAC 8SOIC
Manufacturer
Linear Technology
Type
Power over Ethernet Switch (PoE)r
Datasheet

Specifications of LTC4257IS8

Applications
IP Phones, Power over LAN, Network Routers and Switches
Internal Switch(s)
Yes
Current Limit
350mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
LTC4257
Load Capacitor
IEEE 802.3af requires that the PD maintain a minimum
load capacitance of 5µF. It is permissible to have a much
larger load capacitor and the LTC4257 can charge very
large load capacitors before thermal issues become a
problem. However, the load capacitor must not be too
large or the PD design may violate two IEEE 802.3af
requirements. The LTC4257 goes into current limit at
turn-on and charges the load capacitor with between
300mA and 400mA. The IEEE specification allows this
level of inrush current for up to 50ms. Therefore, it is
necessary that the PD complete charging of the capacitor
within the 50ms time limit. With a maximum input voltage
of –57V, these conditions limit the size of the load
capacitor to 250µF.
Very small output capacitors (≤10µF) will charge very
quickly in current limit. The rapidly changing voltage at
the output may reduce the current limit temporarily,
causing the capacitor to charge at a somewhat reduced
rate. Conversely, charging very large capacitors may
cause the current limit to increase slightly. In either case,
once the output voltage reaches its final value, the input
current limit will be restored to its nominal value.
If the load capacitor is too large there can be an additional
problem with inadvertent power shutdown by the PSE.
Consider the following scenario. If the PSE is running at
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– 57V (maximum allowed) and the PD has been detected
and powered up, the load capacitor will be charged to
nearly – 57V. If for some reason the PSE voltage suddenly
is reduced to – 44V (minimum allowed), the input diodes
will reverse bias and PD power will be supplied solely by
the load capacitor. Depending on the size of the load
capacitor and the DC load of the PD, the PD will not draw
any power from the PSE for a period of time. If this period
of time exceeds the IEEE 802.3af 300ms disconnect
delay, the PSE may remove power from the PD. For this
reason, it is necessary to evaluate the load capacitance
and load current to ensure that inadvertent shutdown
cannot occur.
Maintain Power Signature
In an IEEE 802.3af system, the PSE uses the maintain
power signature (MPS) to determine if a PD continues to
require power. The MPS requires the PD to periodically
draw at least 10mA and also have an AC impedance less
than 26.25kΩ in parallel with 0.05µF. The PD application
circuits shown in this data sheet meet the requirements
necessary to maintain power. If either the DC current is
less than 10mA or the AC impedance is above 26.25kΩ,
the PSE might disconnect power. The DC current must be
less than 5mA and the AC impedance must be above 2MΩ
to guarantee power will be removed.
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