PCA9531D,112 NXP Semiconductors, PCA9531D,112 Datasheet - Page 9

• Manufacturer Part Number: PCA9531D,112
• Description: IC LED DRIVER RGB 16-SOIC
• Manufacturer: NXP Semiconductors
• Type: RGB LED Driverr

Specifications of PCA9531D,112

• Topology: Open Drain, PWM
• Number Of Outputs: 8
• Internal Driver: Yes
• Type - Primary: Backlight, LED Blinker
• Type - Secondary: RGB
• Frequency: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 25mA
• Internal Switch(s): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4003 - DEMO BOARD LED DIMMER568-3615 - DEMO BOARD I2C
• Voltage - Output: -
• Efficiency: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3369-5; 935274731112; PCA9531D

NXP Semiconductors
7. Characteristics of the I
PCA9531_6
Product data sheet
7.1.1 START and STOP conditions
7.1 Bit transfer
7.2 System configuration
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Fig 7.
Fig 8.
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
Bit transfer
Definition of START and STOP conditions
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 06 — 19 February 2009
8).
Figure
data valid
data line
stable;
9).
Figure
allowed
change
of data
7).
8-bit I
STOP condition
mba607
P
2
C-bus LED dimmer
PCA9531
© NXP B.V. 2009. All rights reserved.
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