L6205PD013TR STMicroelectronics, L6205PD013TR Datasheet - Page 8

• Manufacturer Part Number: L6205PD013TR
• Description: IC DRVR FULL BRDG DUAL 20PWRSOIC
• Manufacturer: STMicroelectronics
• Type: H Bridger

Specifications of L6205PD013TR

• Input Type: Non-Inverting
• Number Of Outputs: 4
• On-state Resistance: 300 mOhm
• Current - Output / Channel: 2.8A
• Current - Peak Output: 5.6A
• Voltage - Supply: 8 V ~ 52 V
• Operating Temperature: -25°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: PowerSO-20 Exposed Bottom Pad
• Operating Supply Voltage: 8 V to 52 V
• Supply Current: 0.01 A
• Mounting Style: SMD/SMT
• Operating Temperature Classification: Automotive
• Package Type: PowerSO
• Operating Supply Voltage (min): 8V
• Operating Supply Voltage (typ): 48V
• Operating Supply Voltage (max): 52V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3642-2

L6205
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP
The L6205 integrates two independent Power MOS
Full Bridges. Each Power MOS has an Rd-
son=0.3ohm (typical value @ 25°C), with intrinsic
fast freewheeling diode. Cross conduction protection
is achieved using a dead time (td = 1 s typical) be-
tween the switch off and switch on of two Power MOS
in one leg of a bridge.
Using N Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The Bootstrapped (Vboot)
supply is obtained through an internal Oscillator and
few external components to realize a charge pump
circuit as shown in Figure 3. The oscillator output
(VCP) is a square wave at 600kHz (typical) with 10V
amplitude. Recommended values/part numbers for
the charge pump circuit are shown in Table1.
Table 1. Charge Pump External Components
Figure 3. Charge Pump Circuit
LOGIC INPUTS
Pins IN1
shown in Fig. 4. Typical value for turn-on and turn-off
thresholds
Vthoff=1.3V.
Pins EN
the exception that the drains of the Overcurrent and
thermal protection MOSFETs (one for the Bridge A
and one for the Bridge B) are also connected to these
pins. Due to these connections some care needs to
be taken in driving these pins. The EN
puts may be driven in one of two configurations as
shown in figures 5 or 6. If driven by an open drain
8/21
C
C
R
D1
D2
C compatible logic inputs. The internal structure is
BOOT
P
P
A
A
, IN2
and EN
VCP
Values
D1
R
C
are
P
P
D2
A
, IN1
VBOOT
B
have identical input structure with
respectively
B
C
BOOT
and IN2
VS
220nF
10nF
100
1N4148
1N4148
A
VS
B
B
are TTL/CMOS and
Vthon=1.8V
D01IN1328
A
V
S
and EN
B
and
in-
(collector) structure, a pull-up resistor R
pacitor C
driver is a standard Push-Pull structure the resistor
R
in Fig. 6. The resistor R
range from 2.2k
for R
More information on selecting the values is found in
the Overcurrent Protection section.
Figure 4. Logic Inputs Internal Structure
Figure 5. EN
Figure 6. EN
TRUTH TABLE
X
High Z = High Impedance Output
PUSH-PULL
EN
OUTPUT
COLLECTOR
EN
H
H
H
H
L
and the capacitor C
OUTPUT
EN
OPEN
= Don't care
and C
EN
Driving
INPUTS
are connected as shown in Fig. 5. If the
A
A
IN1
EN
R
X
H
H
L
L
EN
and EN
and EN
5V
are respectively 100K
PROTECTION
to 180K . Recommended values
R
EN
EN
EN
C
A
ESD
EN
A
or EN
or EN
B
B
IN2
EN
EN
C
X
H
H
L
L
Pins Open Collector
B
Pins Push-Pull Driving
EN
B
are connected as shown
should be chosen in the
5V
D01IN1329
High Z
OUT1
GND
GND
Vs
Vs
OUTPUTS
5V
EN
5V
and 5.6nF.
D02IN1349
and a ca-
High Z
OUT2
D02IN1350
GND
GND
Vs
Vs