VNS1NV04D STMicroelectronics, VNS1NV04D Datasheet

MOSFET 2N-CH 40V 1.7A 8-SOIC

VNS1NV04D

Manufacturer Part Number
VNS1NV04D
Description
MOSFET 2N-CH 40V 1.7A 8-SOIC
Manufacturer
STMicroelectronics
Series
OMNIFET II™r
Type
Low Sider
Datasheet

Specifications of VNS1NV04D

Input Type
Non-Inverting
Number Of Outputs
2
On-state Resistance
250 mOhm
Current - Peak Output
1.7A
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
250 m Ohms
Drain-source Breakdown Voltage
40 V
Continuous Drain Current
1.7 A
Power Dissipation
4 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Switch Type
Low Side
Package Type
SO
Operating Temperature (min)
-40C
Operating Temperature (max)
150C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
8
Power Switch Family
VNS1NV04D
Power Switch On Resistance
250mOhm
Output Current
2.6A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Supply
-
Operating Temperature
-
Current - Output / Channel
-
Lead Free Status / Rohs Status
No
Other names
497-2673-5

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(*) Per each device
February 2003
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DESCRIPTION
The VNS1NV04D is a device formed by two
monolithic OMNIFET II chips housed in a
standard SO-8 package. The OMNIFET II are
designed in STMicroelectronics VIPower M0-3
BLOCK DIAGRAM
VNS1NV04D
INPUT1
LINEAR CURRENT LIMITATION
THERMAL SHUT DOWN
SHORT CIRCUIT PROTECTION
INTEGRATED CLAMP
LOW CURRENT DRAWN FROM INPUT PIN
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
ESD PROTECTION
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
COMPATIBLE WITH STANDARD POWER
MOSFET
TYPE
®
250 m (*)
R
DS(on)
TEMPERATURE
CONTROL
OVER
GATE
FULLY AUTOPROTECTED POWER MOSFET
1.7 A (*)
I
lim
OVERVOLTAGE
CURRENT
CLAMP
LIMITER
LINEAR
40 V (*)
V
clamp
SOURCE1
DRAIN1
Technology: they are intended for replacement of
standard Power MOSFETS from DC up to 50KHz
applications. Built in thermal shutdown, linear
current limitation and overvoltage clamp protects
the chip in harsh environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
SOURCE2
DRAIN2
OVERVOLTAGE
CURRENT
LIMITER
LINEAR
CLAMP
VNS1NV04D
TEMPERATURE
CONTROL
SO-8
GATE
OVER
“OMNIFET II”:
INPUT2
1/14
1

Related parts for VNS1NV04D

VNS1NV04D Summary of contents

Page 1

... DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) n COMPATIBLE WITH STANDARD POWER MOSFET DESCRIPTION The VNS1NV04D is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 BLOCK DIAGRAM INPUT1 GATE CONTROL ...

Page 2

... VNS1NV04D ABSOLUTE MAXIMUM RATING Symbol V Drain-source Voltage (V DSn V Input Voltage INn I Input Current INn R Minimum Input Series Impedance IN MINn I Drain Current Dn I Reverse DC Output Current Rn V Electrostatic Discharge (R=1.5K , C=100pF) ESD1 V Electrostatic Discharge on output pins only (R=330 , C=150pF) ESD2 P Total Dissipation at T ...

Page 3

... I =2mA =1mA =0V =1mA IN I =-1mA IN V =13V; V =0V; T =25° =25V Test Conditions V =5V; I =0.5A 25° =5V; I =0. VNS1NV04D Value Unit 30 °C/W 80(*) °C/W Min Typ Max Unit 0.5 2.5 V 100 150 -1.0 -0 Min Typ Max Unit 250 m 500 m 3/14 1 ...

Page 4

... VNS1NV04D ELECTRICAL CHARACTERISTICS (continued) (T DYNAMIC Symbol Parameter Forward g (*) fs Transconductance C Output Capacitance OSS SWITCHING Symbol Parameter t Turn-on Delay Time d(on) t Rise Time r t Turn-off Delay Time d(off) t Fall Time f t Turn-on Delay Time d(on) t Rise Time r t Turn-off Delay Time d(off) ...

Page 5

... I ISS Additional features of this device are ESD protection according to the Human Body model reach the and the ability to be driven from a TTL Logic circuit. VNS1NV04D > jsh through gf , the INPUT pin will fall to 0V the ...

Page 6

... VNS1NV04D Figure 1: Switching Time Test Circuit for Resistive Load d(on) V gen Figure 2: Test Circuit for Diode Recovery Times I OMNIFET 330 6/ gen V gen 90 10% t d(off FAST DIODE gen I OMNIFET V gen t t L=100uH 8.5 ...

Page 7

... Figure 3: Unclamped Inductive Load Test Circuits R GEN Figure 5: Input Charge Test Circuit GEN Figure 4: Unclamped Inductive Waveforms ND8003 VNS1NV04D 7/14 1 ...

Page 8

... VNS1NV04D Source-Drain Diode Forward Characteristics Vsd (mV) 1000 950 Vin=0V 900 850 800 750 700 (A) Derating Curve Static Drain-Source On resistance Vs. Input Voltage Rds(on) (mohms) 500 Tj=150ºC 450 400 350 300 Tj=25ºC 250 200 Tj=-40ºC 150 100 3.5 4 4.5 5 5.5 ...

Page 9

... Turn off drain source voltage slope dv/dt(V/us) 350 300 250 200 150 100 VNS1NV04D Tj=25ºC Vds=13.5V Tj=150ºC Tj=-40ºC 2 2.5 3 3.5 4 4.5 2.25 2.75 3.25 3.75 4.25 4.75 Vin(V) Vin=3.5V Vdd=15V Id=1.5A 500 ...

Page 10

... VNS1NV04D Turn Off Drain-Source Voltage Slope dv/dt(V/us) 350 300 Vin=3.5V 250 Vdd=15V Id=0.5A 200 150 100 500 1000 1500 Rg(ohm) Switching Time Resistive Load t(us) 2 1.75 td(off) Vdd=15V 1.5 Id=0.5A Vin=5V 1.25 1 0.75 0.5 0. 250 500 750 1000 1250 1500 1750 2000 2250 2500 ...

Page 11

... Tc (ºC) Step Response Current Limit Tdlim(us) 2.4 2.3 Vin=5V Rg=330ohm 2.2 2 Vdd(V) Voltage Vs. Normalized Temperature Ilim (A) 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 125 150 175 -50 - VNS1NV04D Current Limit Vs. Junction Vin=5V Vds=13V 100 125 150 175 Tc (ºC) 11/14 ...

Page 12

... VNS1NV04D DIM. MIN 0 0.65 b 0.35 b1 0. 4 3 12/14 SO-8 MECHANICAL DATA mm. TYP MAX. MIN. 1.75 0.25 0.003 1.65 0.85 0.025 0.48 0.013 0.25 0.007 0.5 0.010 45 (typ.) 5.0 0.188 6.2 0.228 1.27 3.81 4.0 0.14 1.27 0.015 ...

Page 13

... Bulk Q.ty Tube length (± 0. (± 0.1) All dimensions are in mm 1.5 1.5 5.5 4.5 2 End Top No components cover 500mm min tape VNS1NV04D 100 2000 532 3.2 6 0.6 REEL DIMENSIONS Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± -0) 12 ...

Page 14

... VNS1NV04D Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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