L9733XP STMicroelectronics, L9733XP Datasheet
L9733XP
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L9733XP Summary of contents
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... Table 1. Device summary Order code L9733XP L9733XPTR L9733CN L9733CNTR July 2010 Octal self configuring low/high side driver Outputs 1-8 are self-configuring as high or low- side drives. Self-configuration allows a user to ...
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Contents Contents 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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L9733 5.1 Serial data output (DO ...
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List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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L9733 List of figures Figure 1. Pin connection (top view ...
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Pin description 1 Pin description Figure 1. Pin connection (top view) Table 2. Pin description N° Pin 1 VDD 2 SCLK SRC1 DRN1 Drain pin of configurable driver #1(0.7 Ω Rds 5 DRN2 Drain pin of configurable ...
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L9733 Table 2. Pin description (continued) N° Pin DRN5 Drain pin of configurable driver #5 (0.7 Ω Rds 19 DRN6 Drain pin of configurable driver #6 (0.7 Ω Rds 20 21 SRC6 22 SRC7 DRN7 Drain pin of low-side driver ...
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... The over-temperature shutdown and over current protection of the device is not guaranteed to stay functional for Vbat between 18 V and 27 V. The reliability and the functionality of the L9733XP are not compromised when the Jump- Start condition is not repeated for more than five times. ...
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L9733 2.1.3 Operation at low battery condition All outputs are able to keep the status in according to the commands on the SPI bus or the PWM inputs. Switching commands entered via the SPI bus might not be executed by ...
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Operating conditions 2.3 Thermal data Table 5. Thermal data Symbol T Operating ambient temperature amb T Storage temperature stg T Maximum operating junction temperature j R Thermal shutdown temperature th R Thermal shutdown temperature hysteresis th-hys R Thermal resistance junction-to-ambient ...
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L9733 3 Electrical performance characteristics These are the electrical capabilities this part was designed to meet required that every part meet these characteristics. 3.1 DC characteristics T = -40 to 125 °C, V amb unless otherwise specified. Table ...
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Electrical performance characteristics Table 6. DC characteristics (continued) Symbol Parameter I DOzol DO Tri-state currents I DOzoh RES ih RES input voltage RES il I RESil RES input current I RESih POR Power on reset threshold th I Vbat sleep ...
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L9733 Table 6. DC characteristics (continued) Symbol Parameter SRC1 – SRC8 open load V voltage (High-side) src1-8open DRN1 - DRN8 DRN1 - DRN8 I - DRN1limit current limits I DRN8limit (low-side) DRN1 - DRN8 I - DRN1OVC overcurrent threshold I ...
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Electrical performance characteristics Table 6. DC characteristics (continued) Symbol Parameter On resistance (1) Rdson Drn1-8 (Drn to SRC1-8) Thermal shutdown (2) Drn1-8 ther temperature (2) Drn1-8 Hysteresis hyst ≤ 1.2 Ω between 3.5 V and 27 ...
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L9733 Table 7. AC characteristics (continued) Symbol Parameter Slew rate SRC1-8 htol turn on SRC1-8 Turn off (High-side) ltoh Delay time Drn1-8 tondly Turn on Drn1-8 Turn off (low-side) toffdly Delay time SRC1-8 tondly Turn on SRC1-8 Turn off (high-side) ...
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Electrical performance characteristics 3.3 SPI characteristics and timings T = -40 to 125 °C, V amb Table 8. SPI characteristics and timings Symbol Parameter DINC in Input capacitance SCLK Cin Output data (do) DO rise rise time Output data (do) ...
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L9733 Figure 3. DO loading for disable time measurement Figure 4. Output loading for slew rate measurements Figure 5. SPI input/output timings CSrise CSrise Figure 6. SPI timing diagram CS CS SCLK SCLK ...
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Functional description 4 Functional description L9733 integrates 8 self-configuring outputs (OUT1-8) which are able to drive either incandescent lamps, inductive loads (non-pwm'd, in pwm is necessary an external diode to reduce flyback power dissipation), or resistive loads biased to Vbat ...
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L9733 transistors. Source pins of outputs 1-5 (Src1-5) are connected to the sources of the N-channel MOSFET transistors. 4.3 Outputs 6-8 These three self-configuring outputs can be used to drive either high or low-side loads. In addition to being controlled ...
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Functional description 4.6 Discrete inputs 4.6.1 Output 6-8 enable input (In6, ln7, ln8) This input allows Output 6 (or Output 7, or Output enabled via this external pin without the use of the SPI. The SPI command ...
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L9733 5 Serial peripheral interface (SPI) The L9733 has a serial peripheral interface consisting of Serial Clock (SCLK), Data Out (DO), Data In (DI), and Chip Select (CS). All outputs will be controlled via the SPI. The input pins CS, ...
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Serial peripheral interface (SPI) 5.4 Serial clock (SCLK) This is the clock signal input for synchronization of serial data transfer. DI data is shifted into the DI input on the rising edge of SCLK and DO data changes on the ...
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L9733 Table 10. Command register logic definition Bit State b0-b7 0 OUT1 - OUT8 are commanded off b0-b7 1 OUT1 - OUT8 are commanded on b0-b7 0 OUT1 - OUT8 diagnostic is No Latch Mode b0-b7 1 OUT1 - OUT8 ...
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Other L9733 features 6 Other L9733 features 6.1 Charge pump usage In order to provide low Rdson values when connected in a high-side configuration, a charge pump to drive the internal gate voltage(s) above Vbat is implemented. The charge pump ...
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... The diagnostic information are: no fault present, overcurrent, open load and short circuit. For L9733XP all of the faults will be cleared on the rising edge of chip select if a valid DI byte was received. For L9733CN The OVC register will be cleared after the end of the diagnosis restart time the input signal (IN) in low state ...
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Fault operation drain voltage is inside the voltage range limited by the two thresholds Vth_Vbat and Vth_GND. An internal current limited voltage regulator fixes the drain voltage inside the described range when no load is connected. 2. Short circuit to ...
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L9733 phase overcurrent protection is a linear current limitation and no diagnosis is available. There are three possibilities to restart one output after the fault has occurred: – Automatically after a time Tres – On the rising edge of CS ...
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Fault operation – On the rising edge (low to high transition) at the corresponding parallel input pin (only for Outputs 6-8). – If the switching OFF protection is not active the On phase overcurrent protection is a linear current limitation ...
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L9733 Figure 7. L9733 application schematic VDD VDD RES RES SCLK SCLK VDO VDO IN6 IN6 To driver 6 To driver 6 IN7 IN7 To driver 7 To driver 7 IN8 IN8 To driver ...
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Fault operation Figure 9. L9733 powertrain applicative examples Tach-Out Tach-Out (PWM) (PWM) Key-On Relay Key-On Relay Fuel Pump Relay Fuel Pump Relay (opt PWM) (opt PWM) L9733 L9733 Coolant Fan Relay Coolant Fan Relay Main Relays and Lamps Driving Main ...
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L9733 8 Application circuit Figure 10. Optimized circuit layout to achieve proper EMI/ESD capability Voltage Reg. Positive ISO - pulse protection VDD 5V VDD on/off for low quiescent current Capacitor impedance Frequency VBAT supplies the floating charge pump. Filtering capacitor ...
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Package information 9 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ...
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L9733 10 Revision history Table 13. Document revision history Date 13-Apr-2005 15-Jun-2006 08-Aug-2006 28-May-2007 17-Jul-2007 03-Aug-2007 12-Jun-2008 02-Dec-2008 13-May-2009 27-Jul-2010 Revision 1 Initial release. 2 Changed only look and feel. 3 Modified Table 9: Bit command register definition on page ...
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