TDA21211 Infineon Technologies, TDA21211 Datasheet - Page 8

• Manufacturer Part Number: TDA21211
• Description: IC MOSFET DRIVER IQFN-40
• Manufacturer: Infineon Technologies
• Type: High Side/Low Side Driverr

Specifications of TDA21211

• Input Type: PWM
• Number Of Outputs: 1
• Current - Peak Output: 35A
• Voltage - Supply: 5 V ~ 30 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• On-state Resistance: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Theory of Operation
The TDA21211 incorporates a high performance gate driver, one high side power MOSFET and one low-side power
MOSFET in a single 40 lead QFN package. The advantages of this arrangement are found in the areas of increased
performance, increased efficiency and lower overall package and layout inductance.This module is ideal for use in
Synchronous Buck Regulators either as a stand-alone power stage that can deliver up to 35A or with an interleaved
approach for higher current loads.
The power MOSFETs are tailored for this device. The gate driver is an extremely robust high-performance driver rated
at the switching node for DC voltages ranging from -1V to +30V. The closely coupled driver and MOSFETs enable
efficiency improvements that are hard to match using discrete components. The power density for transmitted power
of this approach is approximately 30W within a 36mm
Driver Characteristics
The gate driver of the TDA21211 has 2 voltage inputs, VCIN and VDRV. VCIN is the 5V bias supply for the driver.
VDRV is also 5V and is used to drive the High and Low Side MOSFETs. Ceramic capacitors should be placed very
close to these input voltage pins to decouple the sensitive control circuitry from a noisy environment.
The MOSFETs selected for this application are optimized for 5V gate drive, thus giving the end user optimized high
load as well as light load efficiency. The reference for the power circuitry including the driver output stage is PGND
and the reference for the gate driver control circuit (VCIN) is CGND.
Referring to the Block Diagram, Figure 2 VCIN is internally connected to the UVLO circuit and for VCIN voltages less
than required for proper circuit operation will provide shut-down. VDRV supplies both, the floating high side drive and
the low-side drive circuits. An active boot circuit for the high side gate drive is also included. A second UVLO circuitry,
sensing the BOOT voltage level, is implemented to prevent false GH turn on during insufficient power supply level
condition (BOOT Cap charging/discharging sequence). During undervoltage both GH and GL are driven low actively;
further passive pull down (500k Ohm) is placed on each gate.
Note: output signal from UVLO unit.
Data Sheet
UVLO Output
Logic Level
“H”
“L”
Shutdown
V
UVLO_F
2
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area.
V
UVLO_R
Enable
V
CIN
TDA21211