TDA21211 Infineon Technologies, TDA21211 Datasheet - Page 9

• Manufacturer Part Number: TDA21211
• Description: IC MOSFET DRIVER IQFN-40
• Manufacturer: Infineon Technologies
• Type: High Side/Low Side Driverr

Specifications of TDA21211

• Input Type: PWM
• Number Of Outputs: 1
• Current - Peak Output: 35A
• Voltage - Supply: 5 V ~ 30 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• On-state Resistance: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Inputs to the internal control circuit are PWM, DISB# and SMOD#:
The PWM is the control input to the IC from an external PWM controller and is compatible with 3.3V and 5V logic.
The PWM input has three-state functionality. When the voltage remains in the specified PWM-shutdown-window for at
least the PWM-shutdown-holdoff time T_tsshd, the operation will be suspended by keeping both MOSFET gate outputs
low. Once left open, the pin is internally fixed to V
The DISB# is an active low signal. When DISB# is pulled low, the power stage is disabled.
The SMOD# feature is provided to disable the low-side MOSFET during active operation. When synchronized with the
PWM signal (as shown in Figure 7), SMOD# is intended to improve light load efficiency by saving the gate charge loss
of the low-side MOSFET. Once left open, the pin is internally fixed to V
The TDA21211 driver includes gate drive functionality to protect against shoot through. In order to protect the power
stage from overlap, both HS and LS MOSFETs being on at the same time, the adaptive control circuitry monitors the
voltage at the “VSWH” pin. When the PWM signal goes low, HS, the High-side MOSFET will begin to turn off, after the
propagation delay (T_pdlu). Once the “VSWH” pin falls below 1V, LS, the Low-side MOSFET is gated on after the
predefined delay time, (T_pdhl). Additionally, the gate to source voltage of the HS-MOSFET is also monitored. When
VGS(HS) is discharged below 1V, a threshold known to turn HS off, a secondary delay is initiated, (T_pdhl), which
results in LS being gated “ON” irregardless of the state of the “VSWH” pin.This way it will be ensured that the converter
can sink current efficiently and the bootstrap capacitor will be refreshed appropriately during each switching cycle. See
Figure 5 for more detail.
GH and GL are monitoring pins to check the internal gate drive signals.
Data Sheet
PWM
L
H
Open
DISB#
L
H
Open
SMOD#
L
H
Open
Driver Output
GL=H, GH = L
GL=L, GH = H
GL=L, GH = L
Driver Output
Shutdown
Enable
Shutdown
GL Status
L
Enable
Enable
GL, GH = “Active”
GL= “Active”
GL= “Active”
GL, GH = L
GL, GH = L
PWM_O
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= 1.5 V level
SMOD#_O
= 3 V level.
TDA21211