MC33981BPNA Freescale Semiconductor, MC33981BPNA Datasheet - Page 13

• Manufacturer Part Number: MC33981BPNA
• Description: IC SWITCH HI SIDE SINGLE 16-PQFN
• Manufacturer: Freescale Semiconductor
• Type: High Side Switchr

Specifications of MC33981BPNA

• Number Of Outputs: 1
• Rds (on): 4 mOhms
• Internal Switch(s): Yes
• Current Limit: 40A
• Voltage - Input: 6 ~ 27 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-PQFN, 16-PowerQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

depending on EN input.
SLEEP MODE
logic [0]. In this mode, OUT, the gate driver for the external
MOSFET, and all unused internal circuitry are off to minimize
current draw.
UNDER-VOLTAGE
of
supply rises to
reset below
voltage fault in real time.
OVER-TEMPERATURE FAULT
shutdown circuitry on OUT. Over-temperature detection also
protects the low side gate driver (GLS pin). Over-temperature
detection occurs when OUT is in the ON or OFF state and
GLS is at high or low level.
OUT turning OFF until the temperature falls below T
cycle will continue indefinitely until the offending load is
removed.
on OUT.
results in OUT turning OFF and the GLS going to 0V until the
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 5. Operating Modes
H = High level
L = Low level
x = Don’t care
PWM_bar = Opposite of pulse-width modulation signal.
V
The 33981 has 2 operating modes: Sleep and Normal
Sleep Mode is the state of the 33981 when the EN is
The 33981 incorporates under-voltage protection. In case
The 33981 incorporates over-temperature detection and
For OUT, an over-temperature fault condition results in
An over-temperature fault on the low side gate drive
Condition
PWR
Normal
Normal
Normal
Normal
Normal
Sleep
<
V
Figure 12
PWR
V
PWR
(UV)
V
PWR
CONF INHS
(UV)
, the OUT is switched OFF until the power
H
x
L
L
L
L
and
(UV)
. The FS output pin reports the under-
+
Figure 18
PWM
V
H
H
x
L
L
PWR
(UVHYS)
INLS
H
H
H
L
L
x
show an over-temperature
PROTECTION AND DIAGNOSTIC FEATURES
. The latched fault are
FUNCTIONAL DEVICE OPERATION
PWM
OUT
H
H
x
L
L
PWM_bar
GLS
OPERATIONAL MODES
H
H
L
L
x
SD
. This
FS
H
H
H
H
H
H
EN
H
H
H
H
H
L
NORMAL MODE
EN pin is logic [1]. The INHS and INLS commands will be
disabled t
charge of the bootstrap capacitor.
temperature falls below T
offending load is removed. FS pin transition to logic [1] will be
disabled typically t
bootstrap capacitor.
OVER-CURRENT FAULT ON HIGH SIDE
called I
current reaches this level, OUT will stay OFF and the CSNS
pin will go to 0V. The OUT pin is reset (and the fault is
delatched) by a logic [0] at the INHS pin for at least t
When INHS goes to 0 V, CSNS goes to 5.0 V.
the current reaches I
owing to internal logic circuit.
OVER-LOAD FAULT ON LOW SIDE
side overload protection does not measure the current
The 33981 will go to the Normal operating mode when the
Over-temperature faults force the TEMP pin to 0 V.
The OUT pin has an over-current high-detection level
In
This fault detection is active when INLS is logic [1]. Low
Device is in Sleep Mode. The OUT and low side gate are OFF.
Normal Mode. High side and low side are controlled
independently. The high side and the low side are both on.
Normal Mode. High side and low side are controlled
independently. The high side and the low side are both off.
Normal Mode. Half-bridge configuration. The high side is off
and the low side is on.
Normal Mode. Half-bridge configuration. The high side is on
and the low side is off.
Normal Mode. Cross-conduction management is activated.
Half-bridge configuration.
Figure
OCH
ON
for maximum device protection. If at any time the
15, the OUT pin is short-circuited to 0V. When
after the EN transitions to logic [1] to enable the
ON
OCH
after to enable the charge of the
SD
, OUT is turned OFF within t
FUNCTIONAL DEVICE OPERATION
Comments
. This cycle will continue until the
OPERATIONAL MODES
RST(DIAG)
OCH
33981
13
.