L6610N STMicroelectronics, L6610N Datasheet - Page 6

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L6610N

Manufacturer Part Number
L6610N
Description
IC CTRLR HOUSEKEEPING BCD 24-DIP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6610N

Applications
Programmable Housekeeping Controller
Voltage - Supply
4.2 V ~ 7 V
Current - Supply
5mA
Operating Temperature
0°C ~ 105°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Input
-
FUNCTION DESCRIPTION (continued)
L6610
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
(*) mounted on board
6/29
Symbol
Symbol
R
AC-hysteresis
T
Latch-mode
th j-amb
Vdd
Bounce or
Debounce
Dual-OVP
Dual-UVP
T
STO
T
Soft-start
Vdd-OVP
Vdd-UVL
J
L
Name
Supply voltage
Voltage on PROG, PS-ON/Clock, DFAULT, VREF, and error
amplifier pins
Voltage on MFAULT, PW-OK, Dmon and positive UV, OV, OC, AC
sense pins.
Voltage on -5V and -12V UV/OV sense pins
Maximum current in ESD clamp diodes
Operating Junction Temperature
Storage Temperature
Lead Temperature (soldering, 10 seconds)
Max. Thermal Resistance junction-to-ambient (*)
The PS-ON signal input has debounce logic to prevent improper activation. All of the monitored
inputs have digital filtering/debounce logic on board for high noise immunity.
AC sense hysteresis. Programmable hysteresis is provided on the ACsns input (#13) to avoid
undesired shutdown caused by noise as the voltage at the pin is near the threshold or by the
voltage ripple across the bulk capacitor.
Vdd is monitored for overvoltage. If an overvoltage is detected, MFAULT (#1) and DFAULT (#11)
are latched high.
To prevent false signals of any of IC’s output pins, an under voltage lock-out circuit monitors Vdd
and keeps all IC’s output at their default OFF level until Vdd reaches a sufficient minimum
voltage for ensuring integrity. When Vdd goes below the UV threshold, all latches are reset and
volatile programming memory cleared.
Dmon (#10) is monitored to detect an overvoltage condition; in this case MFAULT (#1) and
DFAULT (#11) are latched high.
Dmon (#10) is monitored to detect an undervoltage condition; in this case MFAULT (#1) is
latched high and Cout (#8) is pulled low.
The IC provides an on-board 8ms soft-start, a quasi-monotonic ramp from 0V to 2.5V for the A
error amplifier reference voltage, in order to avoid high current peaks in the primary circuit and
output voltage overshoots at start-up. In fact, if this reference gets the nominal value as soon as
the power-up occurs, the A E/A will go out of regulation and tend to sink much more current, thus
forcing PWM to work with the maximum duty-cycle.
This option allows setting either latched-mode or auto restart after 1 second delay in case of
overcurrent and undervoltage faults.
Parameter
Parameter
Description
SDIP24
70
-0.5 to Vdd+0.5
-0.5 to +16
-25 to 150
-50 to 150
-0.5 to +7
-16 to +5
Value
300
10
SO24
90
°C/W
Unit
Unit
mA
°C
°C
°C
V
V
V
V

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