ISL6520AIRZ-TS2698 Intersil, ISL6520AIRZ-TS2698 Datasheet - Page 6

• Manufacturer Part Number: ISL6520AIRZ-TS2698
• Description: IC CTRLR PWM SYNC BUCK 16-QFN
• Manufacturer: Intersil

Specifications of ISL6520AIRZ-TS2698

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 340kHz
• Duty Cycle: 100%
• Voltage - Supply: 4.5 V ~ 5.5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Frequency-max: 340kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The overcurrent function will trip at a peak inductor current
(I
where I
typical). The OC trip point varies mainly due to the
MOSFET’s r
in the normal operating load range, find the R
from the equation above with:
For an equation for the ripple current see the section under
component guidelines titled “Output Inductor Selection” on
page 8.
Soft-Start
The POR function initiates the soft-start sequence after the
overcurrent set point has been sampled. Soft-start clamps the
error amplifier output (COMP pin) and reference input
(non-inverting terminal of the error amp) to the internally
generated soft-start voltage. Figure 2 shows a typical start-up
interval where the COMP/OCSET pin has been released from
a grounded (system shutdown) state. Initially, the
COMP/OCSET is used to sample the overcurrent setpoint by
disabling the error amplifier and drawing 20µA through
R
soft-start function is initiated. The clamp on the error amplifier
(COMP/OCSET pin) initially controls the converter’s output
voltage during soft-start. The oscillator’s triangular waveform is
compared to the ramping error amplifier voltage. This
generates PHASE pulses of increasing width that charge the
output capacitor(s). When the internally generated soft-start
voltage exceeds the feedback (FB pin) voltage, the output
voltage is in regulation. This method provides a rapid and
I
PEAK
1. The maximum r
2. The minimum I
3. Determine I
PEAK)
OCSET
temperature.
where ΔI is the output inductor ripple current.
=
OCSET
determined by Equation 3:
. Once the overcurrent level has been sampled, the
I
---------------------------------------------------- -
OCSET
FIGURE 1. OVERCURRENT OPERATION
DS(ON)
r
is the internal OCSET current source (20µA
DS ON
PEAK
x R
(
OUTPUT INDUCTOR
OCSET
DS(ON)
variations. To avoid overcurrent tripping
OCSET
)
for
CURRENT
5A/DIV.
TIME (5ms/DIV.)
from the specification table.
at the highest junction
I
PEAK
6
>
I
OUT MAX
(
OCSET
)
+
(
--------- -
ΔI
2
)
resistor
,
(EQ. 3)
ISL6520A
controlled output voltage rise. The entire startup sequence
typically take about 11ms.
Current Sinking
The ISL6520A incorporates a MOSFET shoot-through
protection method which allows a converter to sink current
as well as source current. Care should be exercised when
designing a converter with the ISL6520A when it is known
that the converter may sink current.
When the converter is sinking current, it is behaving as a
boost converter that is regulating it’s input voltage. This
means that the converter is boosting current into the V
rail, which supplies the bias voltage to the ISL6520A. If there
is nowhere for this current to go, such as to other distributed
loads on the V
device, or other methods, the capacitance on the V
will absorb the current. This situation will allow voltage level
of the V
boosted to a level that exceeds the maximum voltage rating
of the ISL6520A, then the IC will experience an irreversible
failure and the converter will no longer be operational.
Ensuring that there is a path for the current to follow other
than the capacitance on the rail will prevent this failure
mode.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible, using ground
plane construction or single point grounding.
CC
COMP/OCSET
rail to increase. If the voltage level of the rail is
1V/DIV.
FIGURE 2. SOFT-START INTERVAL
CC
rail, through a voltage limiting protection
TIME (2ms/DIV.)
500mV/DIV.
V
OUT
December 10, 2009
CC
FN9016.6
CC
bus