IR3831WMTR1PBF International Rectifier, IR3831WMTR1PBF Datasheet - Page 27

IC REG SYNC BUCK 8A 15-QFN

IR3831WMTR1PBF

Manufacturer Part Number
IR3831WMTR1PBF
Description
IC REG SYNC BUCK 8A 15-QFN
Manufacturer
International Rectifier
Series
SupIRBuck™r
Datasheet

Specifications of IR3831WMTR1PBF

Applications
Converter, DDR
Voltage - Input
1.5 ~ 16 V
Number Of Outputs
1
Voltage - Output
0.6 ~ 14.4 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
15-PowerVQFN
Part Status
Preferred
Package
PQFN / 5 x 6
Circuit
Single Output
Iout (a)
8
Switch Freq (khz)
250 - 1500
Input Range (v)
1.5 - 16
Output Range (v)
0.7 - 0.9*Vin
Ocp Otp Uvlo Pre-bias Soft Start And
PGOOD + EN + OVD + DDR Tracking
Server Storage
Yes
Routers Switches
Yes
Base Station Telecom
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3831WMTR1PBFTR
Layout Considerations
The layout is very important when designing high
frequency switching converters. Layout will affect
noise pickup and can cause a good design to
perform with less than expected results.
Make
components in the top layer with wide, copper
filled areas or polygons. In general, it is desirable
to make proper use of power planes and
polygons
dissipation.
The inductor, output capacitors and the IR3831W
should be as close to each other as possible.
This helps to reduce the EMI radiated by the
power traces due to the high switching currents
through them. Place the input capacitor directly at
the Vin pin of IR3831W.
The feedback part of the system should be kept
away from the inductor and other noise sources.
The
capacitors for Vcc should be close to their
respective pins. It is important to place the
feedback
resistors and compensation components close to
Fb and Comp pins.
Rev 14.0
Compensation parts
should be placed as close
as possible to
the Comp
Resistors Rt and
Rocset should be
placed as close as
possible to their pins.
critical
all
pin.
for
components
the
bypass
power
connections
components
distribution
including
AGnd
Fig. 26a. IR3831W layout
considerations – Top Layer
AGnd
for
Vin
the
Vin
and
such
feedback
power
heat
as
AGnd
The connection between the OCSet resistor and
the Sw pin should not share any trace with the
connection between the bootstrap capacitor and
the Sw pin. Instead, it is recommended to use a
Kelvin connection of the trace from the OCSet
resistor and the trace from the bootstrap
capacitor at the Sw pin.
In a multilayer PCB use one layer as a power
ground plane and have a control circuit ground
(analog ground), to which all signals are
referenced. The goal is to localize the high
current path to a separate loop that does not
interfere with the more sensitive analog control
function. These two grounds must be connected
together on the PC board layout at a single point.
The Power QFN is a thermally enhanced
package. Based on thermal performance it is
recommended to use at least a 4-layers PCB. To
effectively remove heat from the device the
exposed pad should be connected to the ground
plane using vias. Figure 26 illustrates the
implementation of the layout guidelines outlined
above, on a 4 layer board.
AGnd
PGnd
Vout
PGnd
Vin
Vin
Vout
IR3831WMPbF
Enough copper &
minimum length
ground path between
Input and Output
All bypass caps
should be placed as
close as possible to
their connecting
pins.
PGnd
Vout
PGnd
Vout
27

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