PM6685 STMicroelectronics, PM6685 Datasheet

IC CTLR DUAL SYNC STDN 5X5VFQFPN

PM6685

Manufacturer Part Number
PM6685
Description
IC CTLR DUAL SYNC STDN 5X5VFQFPN
Manufacturer
STMicroelectronics
Datasheets

Specifications of PM6685

Applications
Controller, Notebook Power System
Voltage - Input
6 ~ 28 V
Number Of Outputs
2
Voltage - Output
-3.3V, 5V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, 32-VFQFPN
Output Voltage
5 V, 3.3 V
Output Current
0.1 A
Input Voltage
5.5 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 10 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
Applications
Table 1.
October 2007
6V to 28V input voltage range
Fixed 5V - 3.3V output voltages
5V and 3.3V voltage always available to deliver
100mA of peak current
1.237V
Lossless current sensing using low side
MOSFETs' R
Negative current limit
Soft-start internally fixed at 2ms
Soft output discharge
Latched OVP and UVP
Selectable pulse skipping at light loads
Selectable minimum frequency (33kHz) in
pulse skip mode
4mW maximum quiescent power
Independent power good signals
Output voltage ripple compensation
Notebook computers
Tablet PC or slates
Mobile system power supply
3 and -4 Cells Li+ battery-powered devices
±
Device summary
1% reference voltage available
Order code
PM6685TR
PM6685
DS(on)
with auxilary voltages for notebook system power
VFQFPN-32 (5mm x 5mm)
VFQFPN-32 (5mm x 5mm)
Dual step-down main supply controller
Rev 7
Package
Description
PM6685 is a dual step-down controller specifically
designed to provide extremely high efficiency
conversion with loss-less current sensing
technique. The constant on-time architecture
assures fast load transient response and the
embedded voltage feed-forward provides nearly
constant switching frequency operation.
An embedded integrator control loop
compensates the DC voltage error due to the
output ripple. The pulse skipping technique
increases efficiency for very light loads. Moreover,
a minimum switching frequency of 33kHz is
selectable in order to avoid audio noise issues.
The PM6685 provides a selectable switching
frequency, allowing either 200kHz/300kHz,
300kHz/400kHz, or 400kHz/500kHz operation of
the 5V/3.3V switching sections.
VFQFPN-32 (5mm x 5mm)
Tape and Reel
Packaging
Tube
PM6685
www.st.com
1/52
52

Related parts for PM6685

PM6685 Summary of contents

Page 1

... PM6685TR October 2007 Dual step-down main supply controller VFQFPN-32 (5mm x 5mm) Description PM6685 is a dual step-down controller specifically designed to provide extremely high efficiency conversion with loss-less current sensing technique. The constant on-time architecture assures fast load transient response and the embedded voltage feed-forward provides nearly constant switching frequency operation ...

Page 2

... Output ripple compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.4 Pulse skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.5 No-audible skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.6 Current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7.7 Soft start and soft end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7.8 Gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.9 Reference voltage and bandgap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.10 Internal linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.11 Power up sequencing and operative modes . . . . . . . . . . . . . . . . . . . . . . . 30 2/52 PM6685 ...

Page 3

... PM6685 8 Monitoring and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.1 Power good signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.2 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.3 Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.4 Undervoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.5 Design guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.6 Switching frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.7 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.8 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.9 Input capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.10 Power MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.11 Closing the integrator loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9 Other parts design ...

Page 4

... SELECTOR LEVEL 3.3V SHIFTER SMPS CONTROLLER STARTUP LDO3 MODE CONTROLLER SELECTOR UVLO + UVLO UVLO LEVEL 5V SHIFTER SMPS CONTROLLER LDO5 LDO3 ENABLE LDO5 ENABLE TERMIC TERMIC FAULT CONTROLLER PM6685 LDO5 V5SW VCC OUT5 BOOT5 HGATE5 PHASE5 CSENSE5 COMP5 LGATE5 PGOOD5 EN5 ...

Page 5

... PM6685 2 Pin settings 2.1 Connections Figure 2. Pin connection (top view) SGND1 COMP3 FSEL EN3 SHDN PGOOD_LDO3 LDO3 OUT3 PM6685 PM6685 Pin settings SKIP BOOT5 HGATE5 PHASE5 CSENSE5 VIN LDO5 V5SW 5/52 ...

Page 6

... Low-side gate driver output for the 3.3V section. Power ground. This pin must be connected to the power ground plan of the power supply. Low-side gate driver output for the 5V section. Signal ground for analog circuitry. It must be connected to the signal ground plan of the power supply. Description sensing) to set the DSON PM6685 ...

Page 7

... PM6685 Table 2. Pin functions (continued) Pin Name 17 V5SW 18 LDO5 19 VIN 20 CSENSE5 21 PHASE5 22 HGATE5 23 BOOT5 24 SKIP 25 EN5 26 PGOOD5 27 PGOOD3 28 LDO3SEL 29 OUT5 30 COMP5 31 VCC Internal 5V regulator bypass connection. – If V5SW is connected to OUT5 ( external 5V supply) and V5SW is greater than 4.9V, the LDO5 regulator shuts down and the LDO5 pin is directly connected to OUT5 through a 3W (max) switch. – ...

Page 8

... Pin settings Table 2. Pin functions (continued) Pin Name 32 VREF 33 EXP PAD 8/52 High accuracy output voltage reference (1.237V). It can deliver 50uA. Bypass to SGND with a 100nF capacitor. Exposed pad. Description PM6685 ...

Page 9

... PM6685 3 Electrical data 3.1 Maximum rating Table 3. Absolute maximum ratings COMPx,FSEL,LDO3_SEL,VREF,SKIP to SGND1,SGND2 ENx,SHDN,PGOOD_LDO3,OUTx,PGOODx,VCC to SGND1,SGND2 LDO3 to SGND1,SGND2 LGATEx to PGND HGATEx and BOOTx, to PHASEx PHASEx to PGND CSENSEx , to PGND CSENSEx to BOOTx_ V5SW, LDO5 _to PGND VIN to PGND PGND to SGND1,SGND2_ Power Dissipation at Tamb = 25ºC Maximum withstanding Voltage range test condition: CDF-AEC-Q100-002- “ ...

Page 10

... Test condition Vout=Vref, LDO5 in regulation FSEL to GND V5SW > 4.9V VOUT3 = 3.3V V >5.1V,V >3.34V OUT5 OUT3 V5SW to 5V LDO5, LDO3 no load SHDN connected to GND, ENx to GND, V5SW to GND, LDO3_SEL to 5V PM6685 Min Typ Max Unit 5 4.5 5.5 V 4.8 4.9 V 4.6 4.75 ...

Page 11

... PM6685 Table 5. Electrical characteristics (continued) Symbol Parameter Current limit and zero crossing comparator I Input bias current limit CSENSE Comparator offset Zero crossing comparator offset V Fixed negative current limit threshold On time pulse width Ton ON-time duration OFF time T Minimum off time OFFMIN ...

Page 12

... Both SMPS sections with respect to VREF. V forced to 5.5V PGOOD3,5 ISink = 4mA V forced to 5.5V PGOOD LDO3 ISink = 4mA (2) (2) (2) Low level (2) Middle level (2) High level V PM6685 Min Typ Max Unit 3.23 3.3 3.37 V 130 165 200 mA Ω 2.0 3 Ω 1.6 2.7 Ω ...

Page 13

... PM6685 Table 5. Electrical characteristics (continued) Symbol Parameter LDO3 3.3V linear regulator selection pin SEL Pulse skip mode SKIP PWM mode Frequency clamp mode Input leakage current 1. by demoboard test 2. by design Test condition (2) Always-off level (2) Bootstrap level (2) Always-on level V (2) (2) (2) ...

Page 14

... V5SW = OUT5, input voltage VIN = 12V, SHDN, EN3 and EN5 high, no load unless specified. Figure 3. 5V output efficiency vs load current Figure 5. PWM no load input battery vs input voltage 14/52 Figure 4. 3.3V output efficiency vs load current Figure 6. Skip no load battery current vs input voltage PM6685 ...

Page 15

... PM6685 Figure 7. Standby mode input battery current vs input voltage Figure 9. 5V switching frequency vs load current Figure 11. LDO5 vs output voltage Typical operating characteristics Figure 8. Shutdown mode input device current vs input voltage Figure 10. 3.3V switching frequency vs load current Figure 12. LDO3 vs output voltage 15/52 ...

Page 16

... Typical operating characteristics Figure 13. 5V voltage regulation vs load current Figure 15. Voltage reference vs load current Figure 17. 5V PWM load transient 16/52 Figure 14. 3.3V voltage regulation vs load current Figure 16. OUT5, LDO3 and LDO5 Power-Up Figure 18. 3.3V PWM load transient PM6685 ...

Page 17

... PM6685 Figure 19. 5V soft start (0.75 Figure 21. 5V soft end (no load) Figure 23. 5V soft end (1 Typical operating characteristics Ω load) Figure 20. 3.3V soft start (0.55 Figure 22. 3.3V soft end (no load) Ω load) Figure 24. 3.3V soft end (1 Ω load) Ω load) 17/52 ...

Page 18

... Typical operating characteristics Figure 25 audible skip mode 18/52 Figure 26. 3.3V no audible skip mode PM6685 ...

Page 19

... PM6685 6 Application schematic Figure 27. Simplified application schematic 4 EN3 25 EN5 32 VREF 24 SKIP 3 FSEL Application schematic 31 VCC 18 LDO5 19 VIN 19/52 ...

Page 20

... The switching frequency of the two sections can be adjusted to approximately 200/300kHz, 300/400kHz or 400/500kHz respectively. In order to maximize the efficiency at light load condition, a pulse skipping mode can be selected. The PM6685 includes also two linear regulators (LDO5 and LDO3) that allow the shutdown of the respective switching sections in low consumption status ...

Page 21

... PM6685 Figure 28. Constant on time PWM control Inductor current Output voltage The duty cycle D of the buck converter in steady state is: Equation 2 The PWM control works at a nearly fixed frequency f Equation 3 As mentioned the steady state switching frequency is theoretically independent from battery voltage and from output voltage. Actually the frequency depends on parasitic voltage drops that are present during the charging path (high side switch resistance, inductor resistance (DCR)) and discharging path (low side switch resistance, DCR) ...

Page 22

... A minimum on-time(150ns typ) is also introduced to assure the start-up switching sequence. PM6685 has a one-shot generator for each power section that turns on the high side MOSFET when the following conditions are satisfied simultaneously: the PWM comparator is high, the synchronous rectifier current is below the current limit threshold, and the minimum off-time has timed out ...

Page 23

... PM6685 Figure 29. Constant ON-time block diagram CSENSE CSENSE CSENSE CSENSE Positive Positive Positive Positive Current Limit Current Limit Current Limit Current Limit COMP COMP COMP COMP OUT OUT OUT OUT VIN VIN VIN VIN SKIP SKIP SKIP SKIP 7.3 Output ripple compensation ...

Page 24

... DC voltage drop V is about 5V-Vr+25mV=4.125V. C INT CINT ILOAD ( SKIP ) I=gm(V1-Vr) I=gm(V1-Vr PWM PWM PWM PWM Comparator Comparator Comparator Comparator RFb1 RFb1 RFb1 RFb1 RFb2 RFb2 RFb2 RFb2 and the output ripple fixed Ton begins r INT − V × OUT T ON × PM6685 ensures ...

Page 25

... PM6685 For higher loads the inductor current doesn’t cross the zero and the device works in the same way as in PWM mode and the frequency is fixed to the nominal value. Figure 31. PWM and pulse skip mode inductor current PWM mode 0 Ton1 Toff Figure 31 shows inductor current waveforms in PWM and SKIP mode ...

Page 26

... The output current limit depends on the current ripple, as shown in 26/52 Figure 33 sensing technique HS Rcsense LS RDS on current source ( connected CSENSE . If the voltage across the sensing element is greater than this CSENSE = I (max) I LOAD Lvalley ) HGATE PHASE CSENSE LGATE pin and determines SENSE ∆ Figure 34 on page 27 PM6685 : ...

Page 27

... Lvalley Where RSNS is the sensing element (R PM6685 provides also a fixed negative peak current limit to prevent an excessive reverse inductor current when the switching section sinks current from the load in PWM mode. This negative current limit threshold is measured between PHASE and SGND pins, comparing the magnitude drop on the PHASE node during the conduction time of the low side MOSFET with an internal fixed voltage of 120mV ...

Page 28

... MOSFET turns on, keeping the output to ground. The soft end time also depends on load condition. 28/52 120 NEG R DSon is required to ensure a soft start without any INT 6 uA ≥ × INT ∆ Lvalley + Current limit threshold EN5/EN3 PM6685 out Time ...

Page 29

... Internal linear regulators The PM6685 has two linear regulators providing respectively 5V(LDO5) and 3.3V(LDO3) at ±2% accuracy. High side drivers, low side drivers and most of internal circuitry are supplied by LDO5 output through VCC pin (an external RC filter may be applied between LDO5 and VCC). Both linear regulators can provide an average output current of 50mA and a peak output current of 100mA. Bypass both LDO5 and LDO3 outputs with a minimum 1µ ...

Page 30

... The 5V linear regulator is always turned on and supplies LDO5 output. The 5V linear regulator is turned off when the voltage on V5SW is above 4.8V and LDO5 output is supplied by the switching 5V output. The 5V linear regulator is turned off when the voltage on V5SW is above 4.8V and LDO5 output is supplied by the external 5V. Description Description Table 7 : PM6685 ...

Page 31

... PM6685 When EN5 and EN3 pins are forced high the switching sections begin their soft start sequence. LDO3 management is independent from the general power up sequence and depends only on LDO3_SEL . Table 9. Operatives modes Mode SHDN is high EN3/EN5 Run pins are high by Both EN5/EN3 pins are ...

Page 32

... Thermal protection The PM6685 has a thermal protection to preserve the device from overheating. The thermal shutdown occurs when the die temperature goes above +150°C. In this case all internal circuitry is turned off and the power sections are turned off after the discharge mode. ...

Page 33

... PM6685 Table 10. Protections and operatives modes Mode Overvoltage OUT5/OUT3 > 115% of the protection nominal value Undervoltage OUT5/OUT3 < 70% of the protection nominal value Thermal T J shutdown 8.5 Design guidelines The design of a switching section starts from two parameters: ● Input voltage range: in notebook applications it varies from the minimum battery voltage, VINmin to the AC adapter voltage, VINmax. ● ...

Page 34

... LRMS LOAD − ∆ max I (max) L × Ipeak I (max) LOAD Series Inductor value (uH) RMS current (A) Saturation current (A) SER1360 MLC 2.2 to 4.5 RLF12560 2 OUT V IN ∆ (max × OUT OUT V IN max ∆ I (max 8 13.6 to 8.8 11 7.5 to 11.5 7.5 to 14.4 PM6685 ...

Page 35

... PM6685 8.8 Output capacitor The selection of the output capacitor is based on the ESR value Rout and the voltage rating rather than on the capacitor value Cout. The output capacitor has to satisfy the output voltage ripple requirements. Lower inductor value can reduce the size of the choke but increases the inductor current ripple ∆IL. ...

Page 36

... Series UMK325BJ106KM-T10 GMK325BJ106MN C3225X5R1E106M = P P DHighSide conduction V = × conduction DSon V ∆ I × − × × (max LOAD Capacitor value Rated voltage (V) (µ must be higher than VINmax. DSS + P switching × 2 OUT I (max) LOAD IN min ∆ I × + × (max LOAD PM6685 × off sw ...

Page 37

... PM6685 As general rule, high side MOSFETs with low gate charge are recommended, in order to minimize driver losses. Below there is a list of possible choices for the high side MOSFET. Table 14. High side MOSFET manufacturer Manufacturer ST ST The power dissipation of the low side MOSFET is given by: ...

Page 38

... ROUT ROUT COUT COUT COUT COUT Rated reverse Gate charge (nC) voltage ( Rated reverse Reverse current voltage (V) (uA) 30 0.00039 20 0.000075 Figure usually enough to I=gm(V1-Vr) I=gm(V1-Vr PWM PWM PWM PWM Comparator Comparator Comparator Comparator RFb1 RFb1 RFb1 RFb1 RFb2 RFb2 RFb2 RFb2 PM6685 ...

Page 39

... PM6685 The stability of the system depends firstly on the output capacitor zero frequency. The following condition should be satisfied: Equation 21 where design parameter greater than 3 and Rout is the ESR of the output capacitor. It determinates the minimum integrator capacitor value CINT: Equation 22 where gm=50us is the integrator transconductance. ...

Page 40

... VRIPPLE is the overall ripple of the T node voltage. It should be chosen higher than approximately 30mV. The stability of the system depends firstly on the output capacitor value and on RTOT: 40/52 Figure 37 COMP PIN T NODE VOLTAGE VOLTAGE ∆ RIPPLE R ESR ∆ I=gm(V1-Vr − R out PM6685 ...

Page 41

... PM6685 Equation 27 The following condition should be satisfied: Equation 28 Where free design parameter greater than 3 and determines the minimum integrator capacitor value CINT: Equation 29 In order to ensure stability it must be also verified that: Equation 30 C must be selected as shown: Equation 31 R must be chosen in order to have enough ripple voltage on integrator input: ...

Page 42

... RESR = 30mΩ. We choose CINT=1nF by equations 31, 32 and Cfilt=47pF, RINT=1.8KΩ by eq.26,27. C=6.8nF by Eq.33. Then R=22KΩ (eq.34) and R1=1KΩ (eq.35). 42/ × ESR ⎛ ⎞ 1 ⎜ ⎜ ⎟ ⎟ × R × π × ⎝ ⎠ − R × π × PM6685 ...

Page 43

... PM6685 9 Other parts design ● VIN filter A VIN pin low pass filter is suggested to reduce switching noise. The low pass filter is shown in the next figure: Figure 38. VIN pin filter Typical components values are: R=3.9Ω and C=4.7uF. ● VCC filter A VCC low pass filter helps to reject switching commutations noise: Figure 39. Inductor current waveforms Typical components values are: R=47Ω ...

Page 44

... The bootstrap diode D must charge the capacitor during the off time phases. The maximum rated voltage must be higher than VINmax. A resistor RBOOT on the BOOT pin could be added in order to reduce noise when the phase node rises up, working like a gate resistor for the turn on phase of the high side MOSFET. 44/ PM6685 ...

Page 45

... PM6685 10 Design example The following design example considers an input voltage from 7V to 16V. The two switching outputs must deliver a maximum current of 5A. The selected switching frequencies are 200kHz for the 5V section and 300kHz for the 3.3V section. 10.1 Inductor selection OUT5 5A, 60% ripple current ...

Page 46

... Tmax = 75°C in RDSon calculation) 46/52 ∆ − (min) I (max) Lvalley LOAD . ≡ ⋅ CSENSE µ 100 A ∆ I (min) = − (min) I (max) Lvalley LOAD . ≡ ⋅ CSENSE µ 100 A PM6685 (min Ω ≈ Ω 686 calculation) DSon = . Ω ≈ Ω 681 ...

Page 47

... Layout guidelines The layout is very important in terms of efficiency, stability and noise of the system possible to refer to the PM6685 demoboard for a complete layout example. For good PC board layout follows these guidelines: ● Place on the top side all the power components (inductors, input and output capacitors, MOSFETs and diodes) ...

Page 48

... SGND in the same point as reference voltage Vref. To avoid capacitive coupling place these traces as far as possible from the gate drivers and phase (switching) paths. ● Place the current sense traces on the bottom side. Use a dedicated connection between the switching node and the current limit resistor RCSENSE. 48/52 PM6685 ...

Page 49

... PM6685 11 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 50

... Package mechanical data Figure 42. Package dimensions 50/52 PM6685 ...

Page 51

... PM6685 12 Revision history * Table 20. Document revision history Date 17-Jan-2006 21-Apr-2006 03-May-2006 29-Jun-2006 11-Sep-2006 24-Oct-2006 18-Oct-2007 Revision 1 Initial release 2 Few updates 3 Graphical updates 4 Mechanical data updated Changes electrical characteristics, added COMP value skip 5 mode, pin out updated 6 Order code table updated Updated: Current sensing option and absolute maximum ...

Page 52

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 52/52 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com PM6685 ...

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