LTC1143LCS-ADJ#PBF Linear Technology, LTC1143LCS-ADJ#PBF Datasheet - Page 11

• Manufacturer Part Number: LTC1143LCS-ADJ#PBF
• Description: IC SW REG STEP-DOWN DUAL 16-SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1143LCS-ADJ#PBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: Adjustable
• Current - Output: 50mA
• Frequency - Switching: 400kHz
• Voltage - Input: 3.5 ~ 16 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

but = 0.005/ C can be used as an approximation for low
voltage MOSFETs.
When selecting the P-channel power MOSFET for each
section, consideration should be given to using a dual MOSFET
with the other half used for the second regulator. Assuming
both sections are operating at similar currents, the required
R
the package dissipation limit. Remember that worst-case
MOSFET dissipation occurs at minimum V
Output Diode Selection (D1, D2)
The Schottky diodes D1 and D2 shown in Figure 1 conduct
during the off-time. It is important to adequately specify
the diode peak current and average power dissipation to
not exceed the diode ratings.
The most stressful condition for the output diode is under
short circuit (V
must safely handle I
Under normal load conditions the average current con-
ducted by the diode is:
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Checklist) to avoid ringing
and increased dissipation.
The forward voltage drop allowable in the diode is calcu-
lated from the maximum short-circuit current as:
where P
determined by efficiency and/or thermal requirements
(see Efficiency Considerations).
C
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle V
prevent large voltage transients, a low effective series
resistance (ESR) input capacitor sized for the maximum
APPLICATIONS
IN
DS(ON)
I
V
DIODE
and C
F
will be half the value of a single MOSFET to stay within
I
D
SC PK
OUT
P
is the allowable power dissipation and will be
D
V
Selection
IN
OUT
V
= 0V). Under this condition the diode
V
U
OUT
SC(PK)
IN
INFORMATION
U
V
at close to 100% duty cycle.
D
I
LOAD
W
IN
.
OUT
U
/ V
IN
. To
RMS current must be used. The maximum RMS capacitor
current is given by:
This formula has a maximum at V
= I
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question. An additional 0.1 F to 1 F ceramic capacitor is
also required on each V
frequency decoupling.
The selection of C
ESR of C
for proper operation of the LTC1143 series:
Optimum efficiency is obtained by making the ESR equal
to R
efficiency degrades by less than 1%. If the ESR is greater
than 2R
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR size/ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for C
rating generally far exceeds the I
In surface mount applications multiple capacitors may
have to be parallel to meet the capacitance, ESR or RMS
current handling requirements of the application.
OUT
C
C
OUT
IN
SENSE
/2. This simple worst-case condition is commonly
Required I
SENSE
Required ESR < 2R
OUT
. As the ESR is increased up to 2R
must be less than twice the value of R
, the voltage ripple on the output capacitor
OUT
RMS
OUT
is driven by the required (ESR). The
LTC1143/LTC1143L
has been met, the RMS current
I
MAX
IN
SENSE
line (Pins 5, 13) for high
LTC1143L-ADJ
V
OUT IN
RIPPLE(P-P)
IN
= 2V
V
V
OUT
IN
V
requirement.
OUT
, where I
SENSE
11
1 2
SENSE
RMS
the