LTC1143LCS-ADJ#PBF Linear Technology, LTC1143LCS-ADJ#PBF Datasheet - Page 13

• Manufacturer Part Number: LTC1143LCS-ADJ#PBF
• Description: IC SW REG STEP-DOWN DUAL 16-SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1143LCS-ADJ#PBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: Adjustable
• Current - Output: 50mA
• Frequency - Switching: 400kHz
• Voltage - Input: 3.5 ~ 16 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS
2) MOSFET gate charge current results from switching
3) I
4) The Schottky diode is a major source of power loss at
drawn from V
input voltage. For V
generally less than 1% for load currents over 30mA.
However at very low load currents the DC bias current
accounts for nearly all of the loss.
the gate capacitance of the power MOSFET. Each time
a MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from V
resulting dQ/dt is a current out of V
much larger than the DC supply current. In continuous
mode, I
a 0.05
results in I
tion, for a 2% to 3% typical midcurrent loss with
V
Note that the gate charge loss increases directly with
both input voltage and operating frequency. This is the
principal reason why the highest efficiency circuits
operate at moderate frequencies. Furthermore, it
argues against using a larger MOSFET than necessary
to control I
as well as money!
of the MOSFET, inductor and current shunt. In continuous
mode the average output current flows through L and
R
MOSFET and Schottky diode. The MOSFET R
plied by the P-channel duty cycle can be summed with
the resistances of L and R
For example, if the R
R
results in losses ranging from 3% to 10% as the output
current increases from 0.5A to 2A. I
efficiency to roll off at high output currents.
high currents and gets worse at high input voltages.
The diode loss is calculated by multiplying the forward
voltage drop times the Schottky diode duty cycle
multiplied by the load current. For example, assuming
a duty cycle of 50% with a Schottky diode forward
voltage drop of 0.4V, the loss increases from 0.5% to
2
IN
SENSE
SENSE
R losses are easily predicted from the DC resistances
= 10V.
, but is “chopped” between the P-channel
= 0.05 , then the total resistance is 0.3 . This
GATECHG
P-channel power MOSFET is 40nC. This
GATECHG
2
R losses, since overkill can cost efficiency
IN
U
= ƒ(Q
, the resulting loss increases with
= 4mA in 100kHz continuous opera-
IN
DS(ON)
INFORMATION
P
U
= 10V the DC bias losses are
). The typical gate charge for
SENSE
= 0.1 , R
W
to obtain I
2
R losses cause the
IN
IN
that is typically
L
to ground. The
= 0.15 , and
DS(ON)
2
U
R losses.
multi-
Figure 5 shows how the efficiency losses in one section of
a typical LTC1143 series regulator end up being appor-
tioned. The gate charge loss is responsible for the majority
of the efficiency lost in the midcurrent region. If Burst
Mode operation was not employed at low currents, the
gate charge loss alone would cause efficiency to drop to
unacceptable levels. With Burst Mode operation, the DC
supply current represents the lone (and unavoidable) loss
component, which continues to become a higher percent-
age as output current is reduced. As expected, the I
losses and Schottky diode loss dominate at high load
currents.
Other losses including C
losses, MOSFET switching losses and inductor core losses,
generally account for less than 2% total additional loss.
Shutdown Considerations
Pins 2 and 10 on the LTC1143 and LTC1143L shut down
their respective sections when pulled high. They require
CMOS logic level signals with t
be floated. The LTC1143L-ADJ gives up the pin-controlled
shutdown function in order to gain feedback pins for
programming the output voltages.
8% as the load current increases from 0.5A to 2A. If
Schotky diode losses routinely exceed 5% consider
using the synchronously switched LTC1142 series.
100
90
85
80
95
0.01
1
⁄
2
Figure 5. Efficiency Loss
LTC1143 I
0.03
GATE CHARGE
OUTPUT CURRENT (A)
LTC1143/LTC1143L
Q
0.1
IN
and C
LTC1143L-ADJ
r
0.3
, t
SCHOTTKY
f
< 1 s and must never
OUT
DIODE
1
LTC1143 • F05
ESR dissipative
I
2
R
3
13
2
R