LTC1143LCS-ADJ#PBF Linear Technology, LTC1143LCS-ADJ#PBF Datasheet - Page 14

• Manufacturer Part Number: LTC1143LCS-ADJ#PBF
• Description: IC SW REG STEP-DOWN DUAL 16-SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1143LCS-ADJ#PBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: Adjustable
• Current - Output: 50mA
• Frequency - Switching: 400kHz
• Voltage - Input: 3.5 ~ 16 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS
LTC1143/LTC1143L
LTC1143L-ADJ
The LTC1143L-ADJ outputs can be turned off in one of two
ways: 1) by placing a power MOSFET switch in the V
to the entire regulator or 2) by pulling the V
1.4V, which trips comparator V and forces P-DRIVE high
(see Functional Diagram). V
small current, but any circuitry used to shut down the
LTC1143L-ADJ in this manner must minimize V
length to prevent noise coupling during normal operation.
In the Figure 6 circuit, taking SHUTDOWN high turns on
PNP Q
properly, RSD must be chosen to pull V
V
depends on the load resistance to prevent V
floating up due to the current flowing into V
Design Example
As a design example, assume V
3.3V, I
immediately be calculated:
Assume a dual P-channel power MOSFET is to be
used and dissipation is to be limited to 1W total at
worst-case lowest V
thermal resistance of the MOSFET package is 50 C/W,
then the junction temperature will be 100 C and
14
OUT
R
t
C
L
OFF
MIN
T
SENSE
Figure 6. Local V
at 0V and minimum V
= 3.63 s/(1.3 10
SD
MAX
= (1/200kHz)[1 – (3.3/12)] = 3.63 s
= 5.1(10
V
100pF
FB
that sources a current into V
= 100mV/2 = 0.05
= 2A and ƒ = 200kHz. R
5
)(0.05
FB
U
V
OUT
Pull-Up Shuts Down LTC1143L-ADJ
R2
R1
50k
IN
INFORMATION
4
Q
= 4V. If T
U
SD
) = 280pF (use 300pF)
(300pF) 3.3V = 25 H
FB
IN
R
V
SD
. Note that this technique
IN
can be pulled high with a
IN
= 12V(nominal), V
200k
100k
W
SENSE
A
FB
FB
= 50 C and the
SHUTDOWN
above 1.4V with
. To shut down
, C
1143 F06
FB
T
FB
.
U
and L can
OUT
pin over
FB
IN
OUT
from
lead
line
=
each MOSFET can now be calculated:
Allowing for V
specify R
a Siliconix Si4953DY, Fairchild NDS8947 or similar
SO-8 dual P-channel MOSFET.
The most stringent requirement for the Schottky diode is
with V
circuit, the worst-case Schottky diode dissipation rises to:
With the 0.05 sense resistor, I
increasing the 0.4V Schottky diode dissipation to 0.8W.
C
temperature and C
optimum efficiency.
Troubleshooting Hints
Since efficiency is critical to LTC1143 series applications
it is very important to verify that the circuit is functioning
correctly in both continuous and Burst Mode operation.
The waveform to monitor is the voltage on the timing
capacitor Pins 6 and 14.
In continuous mode (I
pin should be a sawtooth with a 0.9V
voltage should never dip below 2V as shown in Figure 7a.
When load currents are low (I
operation occurs. The voltage on the C
ground for periods of time as shown in Figure 7b.
If Pin 6 or Pin 14 is observed falling to ground at high
output currents, it indicates poor decoupling or improper
grounding. Refer to the Board Layout Checklist.
P
IN
= 0.005(100 – 25) = 0.38. The maximum R
P - Ch R
P
will require an RMS current rating of at least 1A at
D
OUT
I
SC AVG
DS(ON)
= 0V (i.e. short circuit). During a continuous short
DS(ON)
IN
, this requirement can be met by half of
V
being slightly below the V
D
OUT
2
1
LOAD
1
will require an ESR of 0.05 for
3 3 2 1 38
V
V
> I
OUT
IN
4 1
BURST
LOAD
2
SC(AVG)
) the voltage on the C
< I
BURST
T
= 2A will result,
P-P
pin now falls to
0 11
) Burst Mode
swing. This
GS
DS(ON)
used to
for
T