CDB2000-PC-LCO Cirrus Logic Inc, CDB2000-PC-LCO Datasheet - Page 11

• Manufacturer Part Number: CDB2000-PC-LCO
• Description: BOARD EVAL GEN PURPOSE PLL DC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB2000-PC-LCO

• Accessory Type: Daughter Card
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CDB2000-MB
• For Use With: 598-1491 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1493

DS821DB1
3.3
3.4
3.5
A header (J2) is provided for current measurements. For normal operation, R1 is shorted by a shunt on J2.
If the shunt is removed, the current passes through R1 and a volt meter may be attached to J2. The current
consumed by the CS2000 family device is proportional to the voltage that drops over R1 and can be easily
calculated by dividing the voltage measured on J2 by the resistance of R1 (1 Ω).
Clock Inputs
The DUT (depending on the particular variant used) requires up to two clock inputs, REF_CLK and CLK_IN.
Note that the REF_CLK and CLK_IN BNC inputs are terminated with 50 Ohms by R23 and R14.
The CS2000, CS2100, and CS2200 sub-family devices require an external REF_CLK to be supplied and
can all be used with either the -XTL, -OSC, or -CLK daughter cards. The CS2300 sub-family generates
REF_CLK internally and must be used with an -LCO daughter card.
There are several options to generate REF_CLK (see
daughter card is used, REF_CLK is generated on the daughter card by a local crystal or a local oscillator,
respectively.
If a -CLK daughter card is used, REF_CLK will be supplied from the motherboard via the header (J8). On
the motherboard, there are two possible sources for REF_CLK, the right-angled BNC connector (J6) or the
on-board oscillator (Y1). The selection between the two is made via DIP switch position 1, which generates
the OSC.REFCLK.EN signal. U2-C is used as an inverter for OSC.REFCLK.EN and generates the
BNC.REFCLK.EN signal. If the switch is in the lower (closed) position, OSC.REFCLK.EN is pulled low and
powers up the oscillator via Q1. It also enables the tri-statable buffer U3-C to pass the oscillator output to
the DUT. If the switch is in the upper (open) position, OSC.REFCLK.EN is pulled high (via R61), which pow-
ers down the oscillator and tri-states U3-C. BNC.REFCLK.EN is then low, which enables the tri-statable
buffer U3-B to pass the BNC input from J6 to the DUT. D1 and D2 visually indicate which REF_CLK source
is currently selected via the DIP switch.
CLK_IN is always routed from the BNC connector (J3) to the DUT via a buffer (U2-B) and header J1.
CLK_IN is required for the CS2100 and the CS2300 sub-families. It is optional for the CS2000 sub-family
and not supported on the CS2200 sub-family.
If it is not desirable to buffer the input clocks to the DUT, U2-B may be bypassed by moving the 22 Ω resistor
from position R6 to position R5. Likewise, U3-B may be bypassed by moving the 22 Ω resistor from position
R26 to position R25.
Clock Outputs
The DUT supports two outputs, CLK_OUT and AUX_OUT.
CLK_OUT is routed from the DUT to the output buffer U4-B via header J1 and on to the BNC connector J7.
AUX_OUT is routed from the DUT to the output buffer U1-B via header J1 and on to the BNC connector J4.
If it is not desirable to buffer the output clocks from the DUT, U4-B may be bypassed by moving the 22 Ω
resistor from position R30 to position R27. Likewise, U1-B may be bypassed by moving the 22 Ω resistor
from position R8 to position R9.
U4-C and U1-C are used to invert miscellaneous control signals that are needed by other functional blocks.
Micro-Controller
The CDB2000-MB utilizes a SiLabs ® 8051-compatible micro-controller with integrated USB PHY for con-
venient interconnect to a PC. The micro-controller comes pre-programmed with custom firmware that allows
it to interact with the CDK2000 Configuration Wizard as well as operate in Stand-Alone mode without a PC.
Table 1
and
Table 2 on page
4). If a -XTL or -OSC
CDK2000
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