CDB2000-PC-LCO Cirrus Logic Inc, CDB2000-PC-LCO Datasheet - Page 14

• Manufacturer Part Number: CDB2000-PC-LCO
• Description: BOARD EVAL GEN PURPOSE PLL DC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB2000-PC-LCO

• Accessory Type: Daughter Card
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CDB2000-MB
• For Use With: 598-1491 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1493

14
4.4.3
In Production mode (DIP switch position 5 in the lower (or closed) position), if any violations occur, the
programming sequence is terminated immediately (before writing to the OTP on the DUT) and an error
condition will be flagged. This mode is most suitable for a production environment where strict enforce-
ment of mismatches is desired, for instance to detect a situation where a configuration file was designed
for a different base part than what’s currently present on the board, and thereby preventing a large batch
of parts from being mis-programmed.
Furthermore, in Development mode, at the end of the programming sequence, the DUT will be reset and
remain in a powered-on state to allow for verification and continued development; whereas in Production
mode, at the end of the programming sequence the DUT will be powered-down to allow for removal from
the socket and insertion of another DUT.
Program Sequence Execution and Result Codes
After a configuration file has been downloaded and the board has been properly configured for either De-
velopment or Production mode, the actual programming sequence may then be initiated via the push-but-
ton (S1) or via the host software (see
while the programming sequence is in progress. During the execution of the programming sequence, D3
(V
troller goes through the various steps necessary to program the device. At the end of the programming
sequence, D5 (PROG.RUN), D6 (PROG.SUCCESS), and D7 (PROG.FAIL) will indicate one of several
possible result codes as outlined in
The LED pattern for each result code has been carefully designed to convey as much information as pos-
sible without being confusing or overwhelming. In all cases, at most one of the three LEDs will be lit in a
solid on state:
• If the yellow RUN LED is lit solid, programming is in progress, pending results.
• If the green SUCC LED is lit solid, the programming sequence concluded without errors. The other two
Code
Error
DUT
10
12
13
14
11
status LEDs indicate warnings, if any.
0
1
2
3
4
5
6
7
8
9
), D4 (V
Warning: attempt to clear a ‘1’ and set a locked ‘0’ in OTP
Error: attempt to clear a ‘1’ and set a locked ‘0’ in OTP
Invalid: unsupported revision of CS2000 family device
Invalid: DUT is not a member of the CS2000 family
PROG
Warning: attempt to set a locked ‘0’ in OTP
Error: attempt to set a locked ‘0’ in OTP
Warning: attempt to clear a ‘1’ in OTP
), D9 (DUT.SW), and D10 (DUT.HW) will turn on and off repeatedly as the micro-con-
Invalid: no configuration file present
Error: attempt to clear a ‘1’ in OTP
Error: general or unknown error
Success: no error encountered
Error: OTP read-back error
Programming in progress
Error: register read error
Invalid: no DUT found
Result/Status
Table 3
Table 3. Error Codes
Section 4.1.3 on page 13
below.
for details). D5 (PROG.RUN) will be lit
D5 (RUN) D6 (SUCC) D7 (FAIL)
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
OFF
OFF
OFF
OFF
OFF
OFF
ON
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
CDK2000
DS821DB1
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON