STEVAL-PCC010V1 STMicroelectronics, STEVAL-PCC010V1 Datasheet - Page 45

• Manufacturer Part Number: STEVAL-PCC010V1
• Description: BOARD EVAL FOR ST802RT1
• Manufacturer: STMicroelectronics

Specifications of STEVAL-PCC010V1

• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST802RT1
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: MII, RMII
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10360

ST802RT1A, ST802RT1B
7.18
7.19
FX mode operation
Each port of the ST802RT1x may also be configured for 100BASE-FX transmission over
fiber optics via a pseudo-ECL (PECL) interface.
In 100Base-Fx mode, scrambling and MLT3-to-binary conversion are bypassed when
transmitting, whereas in reception adaptive equalization, binary-to-MLT3 and descrambling
are bypassed.
IEEE standard auto-negotiation functions are also supported unless the device operates
in100Base-Fx mode. When operating in 100Base-Fx the device supports FEF (far-end-fault)
logic to communicate remote fault detection.
The ST802RT1x provides a pseudo-ECL interface suitable for driving a fiber optic interface.
Fiber ports cannot be enabled by auto-negotiation but only either by hardware or through
the MDIO interface. When 100BASE FX is enabled, pins SD+ and SD- indicate the signal
quality status on the fiber optic link. 100 BASE FX mode is automatically selected whenever
a valid differential signal is detected at the SD+ and SD- inputs; when SD+ and SD- are tied
low or left unconnected, the respective PHY is forced in base T mode.
The data flow for 100BASE FX is:
Serialized data -> NRZI encoding -> multimode DAC -> PECL format.
To allow the detection of remote fault conditions in 100BASE FX, the IEEE 802.3 standard
far-end-fault is implemented as in the IEEE 802.3u standard, Clause 24 (24.3.2.1); by
default FEF is on. When FEF is on, a PHY transmits a FEF indication whenever a receive
channel failure is detected and also the PHY continuously monitors the receive channel
when a valid signal is present. When its link partner is indicating a remote error, the PHY
forces its link monitor into the “link fail” state, setting the remote fault bit in the status register
(RN01).
In 100BASE-FX mode there is no scrambling function and the data is only NRZI encoded.
the multimode DAC drives the PECL levels to an external fiber optic transmitter. When there
is no transmission, the device generates “IDLE” symbols.
FX operation detect circuit
This circuit decodes the information on the status of the optical link. Particularly in the ANSI
specification, it is stated that the signal detect indicates the presence of the optical signal
with sufficient quality to correctly identify a line state.
Both signals tied to ground -> No FX mode required
SD- > SD+ -> FX mode is asserted but no data valid on the line
SD+ > SD- -> FX mode asserted. Link OK
Doc ID 17049 Rev 1
Device operation
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