EVAL-ADN2850-25EBZ Analog Devices Inc, EVAL-ADN2850-25EBZ Datasheet - Page 7

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EVAL-ADN2850-25EBZ

Manufacturer Part Number
EVAL-ADN2850-25EBZ
Description
BOARD EVALUATION FOR ADN2850-25
Manufacturer
Analog Devices Inc

Specifications of EVAL-ADN2850-25EBZ

Main Purpose
Digital Potentiometer
Utilized Ic / Part
ADN2850-35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
RDAC
EEMEM C3 C2 C1 C0
Inst
Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
NOTES
1
2
3
4
5
REV. B
The SDO output shifts out the last 24 bits of data clocked into the serial register for daisy-chain operation. Exception: for any instruction following Instruction 9 or 10,
the selected internal register data will be present in data byte 0 and 1. The instructions following 9 and 10 must also be a full 24-bit data-word to completely clock out
the contents of the serial register.
The RDAC register is a volatile scratch pad register that is refreshed at power ON from the corresponding nonvolatile EEMEM register.
Execution of the above operations takes place when the CS strobe returns to logic high.
Instruction 3 writes 2 data bytes (total 16-bit) to EEMEM. But in the cases of addresses 0 and 1, only the last 10 bits are valid for wiper position setting.
The increment, decrement, and shift commands ignore the contents of the shift register data bytes 0 and 1.
Command bits are C0 to C3. Address bits are A3–A0. Data bits D0 to D9 are applicable to RDAC wiper register whereas D0 to D15 are applicable to EEMEM
Register. Command instruction codes are defined in Table II.
4
5
5
5
5
5
5
5
5
MSB
C3 C2 C1 C0
Instruction Byte 0
B23 • • • • • • • • • • • • • • • • B16 B15 • • • • • • B8 B7 • • • • • B0
C3 C2 C1 C0 A3 A2 A1 A0 X • • • • D9 D8
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Instruction Byte 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X X X X
0
0
A3 A2 A1 A0 D15 • • • • D8
0
X X X X
0
X X X X
X X X X
A3 A2 A1 A0 X • • • • X X
0
0
0
X X X X
0
X X X X
0
0
0
0
0
0
0
0
0
A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
0
0
0
0
0
A0 X • • • • X X
A0 X • • • • X X
A0 X • • • • X X
A0 X • • • • X X
A0 X • • • • X X
A0 X • • • • D9 D8
A0 X • • • • X X
A0 X • • • • X X
Table II. Instruction Operation Truth Table
0
X • • • • X X
X • • • • X X
X • • • • X X
X • • • • X X
X • • • • X X
X • • • • X X
Data Byte 1
A0 X
Table I. 24-Bit Serial Data-Word
X
D7 • • • • • D0
X • • • • • • X NOP: Do nothing. See Table XI for Programming
X • • • • • • X Retrieve contents of EEMEM(A0) to RDAC(A0)
X • • • • • • X SAVE WIPER SETTING: Write contents of RDAC(A0)
D7 • • • • • D0 Write contents of Serial Register Data Bytes 0 and
X • • • • • • X Decrement 6 dB: Right shift contents of RDAC(A0)
X • • • • • • X Decrement All 6 dB: Right shift contents of all RDAC
X • • • • • • X Decrement contents of RDAC(A0) by “One,” stops
X • • • • • • X Decrement contents of all RDAC Registers by
X • • • • • • X RESET: Load all RDACs with their corresponding
X • • • • • • X Transfer contents of EEMEM (ADDR) to Serial
X • • • • • • X Transfer contents of RDAC (A0) to Serial Register
D7 • • • • • D0 Write contents of Serial Register Data Bytes 0 and
X • • • • • • X Increment 6 dB: Left shift contents of RDAC(A0),
X • • • • • • X Increment contents of RDAC(A0) by “One,” stops
Data Byte 0 Operation
X • • • • • • X Increment All 6 dB: Left shift contents of all RDAC
X • • • • • • X Increment contents of all RDAC Registers by “One,”
–7–
X
Data Byte 1
X
X
example.
Register. This command leaves device in the Read
Program power state. To return part to the idle state,
perform NOP instruction 0. See Table XI.
to EEMEM(A0). See Table X.
1 (total 16-bit) to EEMEM(ADDR). See Table XIII.
Register, stops at all “Zeros.”
Registers, stops at all “Zeros.”
at all “Zeros.”
“One,” stops at all “Zeros.”
EEMEM previously saved values.
Register Data Bytes 0 and 1, and previously stored
data can be read out from the SDO pin. See Table XIV.
Data Bytes 0 and 1, and wiper setting can be read
from the SDO pin. See Table XV.
1 (total 11-bit) to RDAC(A0). See Table IX.
stops at all “Ones.” See Table XII.
Registers, stops at all “Ones.”
at all “Ones.” See Table X.
stops at all “Ones.”
X
1, 2, 3
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data Byte 0
ADN2850
LSB

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