EVAL-ADN2850-25EBZ Analog Devices Inc, EVAL-ADN2850-25EBZ Datasheet - Page 24

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EVAL-ADN2850-25EBZ

Manufacturer Part Number
EVAL-ADN2850-25EBZ
Description
BOARD EVALUATION FOR ADN2850-25
Manufacturer
Analog Devices Inc

Specifications of EVAL-ADN2850-25EBZ

Main Purpose
Digital Potentiometer
Utilized Ic / Part
ADN2850-35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
ADN2850
RESISTANCE TOLERANCE, DRIFT, AND
TEMPERATURE COEFFICIENT MISMATCH
CONSIDERATIONS
In operation, such as gain control, the tolerance mismatch
between the digital resistor and the discrete resistor can cause
repeatability issues among various systems (see Figure 42).
Because of the inherent matching of the silicon process, it is
practical to apply the dual-channel device in this type of
application. As such, R1 can be replaced by one of the channels
of the digital resistor and programmed to a specific value. R2 can
be used for the adjustable gain. Although it adds cost, this approach
minimizes the tolerance and temperature coefficient mismatch
between R1 and R2. This approach also tracks the resistance
drift over time. As a result, these less than ideal parameters
become less sensitive to system variations.
Figure 42. Linear Gain Control with Tracking Resistance Tolerance,
* REPLACED WITH ANOTHER
CHANNEL OF RDAC
R1*
Drift, and Temperature Coefficient
V
i
AD8601
+
B
W
C1
R2
U1
V
O
Rev. C | Page 24 of 28
RDAC CIRCUIT SIMULATION MODEL
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. A parasitic
simulation model is shown in Figure 43.
The following code provides a macro model net list for the
25 kΩ RDAC:
.PARAM D = 1024, RDAC = 25E3
*
.SUBCKT DPOT ( W, B)
*
CW
RWB W
CB
*
.ENDS DPOT
W
B
Figure 43. RDAC Circuit Simulation Model (RDAC = 25 kΩ)
0
B
0
80E-12
{D/1024 * RDAC + 50}
11E-12
RDAC
25kΩ
W
80pF
C
11pF
B
B

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